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ST52T400 数据表(PDF) 31 Page - STMicroelectronics |
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ST52T400 数据表(HTML) 31 Page - STMicroelectronics |
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31 / 94 page  ST52T400/T440/E440/T441 31/94 Table 2.6 Arithmetic and Logic Instruction Set (Continued) Arithmetic Instructions Mnemonic Instruction Bytes Cycles Z S C ADD ADD regx, regy 3 17 I - I ADDO ADDO regx, regy 3 20 I I I AND AND regx, regy 3 17 I - - ASL ASL regx 2 15 I - I ASR ASR regx 2 15 I I - DEC DEC regx 2 15 I I - DIV DIV regx, regy 3 26 I I I INC INC regx 2 15 I - I MULT MULT regx, regy 3 19 I - - NOT NOT regx 2 15 I - - OR OR regx, regy 3 17 I - - SUB SUB regx, regy 3 17 I I - SUBO SUBO regx, regy 3 20 I I I MIRROR MIRROR regx 2 15 I - - Jump Instructions Mnemonic Instruction Bytes Cycles Z S C CALL CALL addr 3 18 - - - JP JP addr 3 12 - - - JPC JPC addr 3 10/12 - - - JPNC JPNC addr 3 10/12 - - - JPNS JPNS addr 3 10/12 - - - JPNZ JPNZ addr 3 10/12 - - - JPS JPS addr 3 10/12 - - - JPZ JPZ addr 3 10/12 - - - RET RET 1 13 - - - Interrupt Instructions Set Mnemonic Instruction Bytes Cycles Z S C HALT HALT 1 7/15 - - - MEGI MEGI 1 7/15 - - - MDGI MDGI 1 6 - - - RETI RETI 1 12 - - - RINT RINT const 2 8 - - - UDGI UDGI 1 6 - - - UEGI UEGI 1 7/15 - - - WAITI WAITI 1 7/14 - - - |
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