数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

STR910FAM32 数据表(PDF) 65 Page - STMicroelectronics

部件名 STR910FAM32
功能描述  ARM966E-S??16/32-Bit Flash MCU with Ethernet, USB, CAN, AC motor control, 4 timers, ADC, RTC, DMA
PDF  101 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STR910FAM32 数据表(HTML) 65 Page - STMicroelectronics

Back Button STR910FAM32 Datasheet HTML 61Page - STMicroelectronics STR910FAM32 Datasheet HTML 62Page - STMicroelectronics STR910FAM32 Datasheet HTML 63Page - STMicroelectronics STR910FAM32 Datasheet HTML 64Page - STMicroelectronics STR910FAM32 Datasheet HTML 65Page - STMicroelectronics STR910FAM32 Datasheet HTML 66Page - STMicroelectronics STR910FAM32 Datasheet HTML 67Page - STMicroelectronics STR910FAM32 Datasheet HTML 68Page - STMicroelectronics STR910FAM32 Datasheet HTML 69Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 65 / 101 page
background image
STR91xFAx3x, STR91xFAx4x
Electrical characteristics
65/101
7.7
Clock and timing characteristics
Table 17.
Internal clock frequencies
Symbol
Parameter
Conditions
Value
Unit
Min
Typ
Max
fMSTR
CCU Master Clock
32.768
fCPUCLKmax
kHz
fCPUCLK
CPU Core Frequency
Executing from SRAM
96
MHz
Flash size
512 KB
Executing from Flash
96
MHz
Flash size
= 1 MB / 2
MB, executing from
SRAM or Flash (except
RWW)
VDD 1.75 V
96
MHz
Flash size
= 1 MB / 2
MB, executing from
SRAM or Flash (except
RWW)
VDD 1.65 V
85
MHz
Flash size
= 1 MB / 2
MB, Flash read while
write (RWW),
VDD 1.75 V
(1)
85
MHz
Flash size
= 1 MB / 2
MB, Flash read while
write (RWW),
1.65 < VDD < 1.75 V
(1)
75
MHz
fPCLK
Peripheral Clock for APB
48
MHz
fHCLK
Peripheral Clock for AHB
fCPUCLKmax
MHz
fOSC
Clock Input
4
25
MHz
fFMICLK
FMI Flash Bus clock
(internal clock)
fCPUCLKmax
MHz
fBCLK
External Memory Bus clock
fCPUCLKmax
MHz
fRTC
RTC Clock
32.768
kHz
fEMAC
EMAC PHY Clock
25
MHz
fUSB
USB Clock
48
MHz
fTIMCLKEXT Timer External Clock
0
fPCLKmax/4
= 12
MHz
fTIMCLK
Timer Clock when Internal
Clock (PCLK) is selected
0
fPCLKmax
= 48
MHz
1.
To avoid the speed restriction on RWW, the Flash write erase routines can be executed from SRAM, at up to 85 or 96
MHz, depending on VDD.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com