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STR910FAM32 数据表(PDF) 89 Page - STMicroelectronics |
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STR910FAM32 数据表(HTML) 89 Page - STMicroelectronics |
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89 / 101 page ![]() STR91xFAx3x, STR91xFAx4x Electrical characteristics 89/101 7.13 ADC electrical characteristics VDDQ = 2.7 - 3.6V, VDD = 1.65 - 2V, TA = -40 / 85 °C unless otherwise specified. Table 47. General ADC electrical characteristics Symbol Parameter(1) Test Conditions Value Unit Min Typ Max VAIN Input Voltage Range 0 AVREF V RES Resolution 10 Bits NCH Number of Input Channels 8 N fADC ADC Clock Frequency 25 MHz tPOR(ADC) POR bit set to Standby mode 500 ms tck_off(ADC) ADC clock disabled before conversion (2) 1ms tSTAB Stabilization time 15 µs CIN Input Capacitance 5 pF ED Differential Non-Linearity (3) (4) 13 LSB(5) EL Integral Non-Linearity (3) 36 LSB(5) EO Offset Error (3) 36 LSB(5) EG Gain Error (3) 0.5 2 LSB(5) ET Total Unadjusted Error (3) 46 LSB(5) IADC Power Consumption 4.6 mA IVREF Current on VREF input pin (6) (7) 920 µA 1. Guaranteed by design, not tested in production. 2. The ADC clock can be disabled by setting the ADC bit in the SCU_PCGR1 register or by setting the ACG bit in the SCU_GPIOANA register (for Rev H and higher) 3. Conditions: AVSS = 0 V, AVDD = 3.3 V fADC = 25 MHz. 4. The A/D is monotonic, there are no missing codes. 5. 1 LSB = (AVDD - AVSS)/1024 6. Data based on characterization, not tested in production. 7. Conditions: VDD=1.8 V, fCPU=96 MHz , fADC=24 MHz |
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