STR910FAM32 datasheet(24/101 Pages) STMICROELECTRONICS

24 / 101 page

Functional overview

STR91xFAx3x, STR91xFAx4x

24/101

Mode. The entire chip is quiescent (except for RTC and wake-up circuitry). There are three

means to exit Sleep Mode and re-start the system:

●

Some resets (external reset pin, low-voltage, power-up, JTAG debug command)

●

RTC alarm

●

Input from wake-up unit

3.12

Voltage supplies

The STR91xFA requires two separate operating voltage supplies. The CPU and memories

operate from a 1.65V to 2.0V on the VDD pins, and the I/O ring operates at 2.7V to 3.6V on

the VDDQ pins.

In Standby mode, both VDD and VDDQ must be shut down. Otherwise the specified

maximum power consumption for Standby mode (IRTC_STBY and ISRAM_STBY) may be

exceeded. Leakage may occur if only one of the voltage supplies is off.

3.12.1

Independent A/D converter supply and reference voltage

The ADC unit on 128-pin and 144-ball packages has an isolated analog voltage supply input

at pin AVDD to accept a very clean voltage source, independent of the digital voltage

supplies. Additionally, an isolated analog supply ground connection is provided on pin AVSS

only on 128-pin and 144-ball packages for further ADC supply isolation. On 80-pin

packages, the analog voltage supply is shared with the ADC reference voltage pin (as

described next), and the analog ground is shared with the digital ground at a single point in

the STR91xFA device on pin AVSS_VSSQ.

A separate external analog reference voltage input for the ADC unit is available on 128-pin

and 144-ball packages at the AVREF pin for better accuracy on low voltage inputs. For 80-

pin packages, the ADC reference voltage is tied internally to the ADC unit supply voltage at

pin AVREF_AVDD, meaning the ADC reference voltage is fixed to the ADC unit supply

voltage.

See Table 11: Operating conditions, for restrictions to the relative voltage levels of VDDQ,

AVDD, AVREF, and AVREF_AVDD.

3.12.2

Battery supply

An optional stand-by voltage from a battery or other source may be connected to pin VBATT

to retain the contents of SRAM in the event of a loss of the main digital supplies (VDD and

VDDQ) . The SRAM will automatically switch its supply from the internal VDD source to the

VBATT pin when the voltage of VDD drops below the LVD threshold. In order to use the

battery supply, the LVD must be enabled.

The VBATT pin also supplies power to the RTC unit, allowing the RTC to function even when

the main digital supplies (VDD and VDDQ) are switched off. By configuring the RTC register,

it is possible to select whether or not to power from VBATT only the RTC unit, or power the

RTC unit and the SRAM when the STR91xFA device is powered off.

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