ST6369 datasheet(6/71 Pages) STMICROELECTRONICS

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VDD

PC0 ( SCL )

PC1 ( SDA )

PC2

PC3 ( SEN )

PC4 ( PWRIN )

PC5

PC6 ( HSYNC )

PC7

RESET

OSCOUT

OSCIN

HDA

TEST

VSYNC

N.C.

DA1

DA0

DA2

DA3

DA4

DA5

PB1

PB2

PB4

PB5

PB6

PA0

PA1

PA2

PA3

PA4

PA5

PA6 ( HD0 )

PA7 ( HD1 )

VR0G1375

ST6369

Figure 1. ST6369 Pin Configuration

GENERAL DESCRIPTION

The ST6369 microcontroller is member of the 8-bit

HCMOS ST638x family, a series of devices specially

oriented to Digital Controlled Multi Frequency Moni-

tor applications. ST6369 members are based on a

building block approach: a common core is sur-

rounded by a combination of on-chip peripherals

(macrocells) available from a standard library. These

peripherals are designed with the same Core tech-

nology providing full compatibility and short design

time. Many of these macrocells are specially dedi-

cated to DCMF Monitor applications. The macro-

cells of the ST6369 are: two Timer peripherals each

including an 8-bit counter with a 7-bit software pro-

grammable prescaler (Timer), a digital hardware ac-

tivated watchdog function (DHWD), a 14-bit voltage

synthesis tuning peripheral, a Serial Peripheral Inter-

face (SPI), six 6-bit PWM D/A converters, an A/D

converter with 0.5V resolution, a 14-bit PWM D/A

converter. In addition the following memory re-

sources are available: program ROM (8K bytes),

data RAM (256 bytes), EEPROM (384 bytes).

ST6369

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