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ST6369 数据表(PDF) 61 Page - STMicroelectronics |
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ST6369 数据表(HTML) 61 Page - STMicroelectronics |
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61 / 71 page  STACK LEVEL 1 STACK LEVEL 2 STACK LEVEL 3 STACK LEVEL 4 STACK LEVEL 5 STACK LEVEL 6 PC D/ A Outputs TIMER 2 INTERRUPT Inputs TEST TIMER 1 PORT C PORT B PORT A A/D Input DIGITAL WATCHDOG/TIMER SERIAL PERIPHERAL INTERFACE VDD V SS OSCin OSCout RESET VR 0D1753 PA0 PA7 * HDA,DA0 DA5 HSYNC/PC6 VSYNC TEST / V PP AD PB0 PB7 * PC2,PC4 PC7 * PC0 / SCL PC1 / SDA PC3 / SEN POWER SUPPLY OSCILLATOR RESET 8-BIT CORE USER PROGRAM EPROM 8 kBytes DATA ROM USER SELECTABLE DATA EEPROM 384 Bytes DATA RAM 256 Bytes * Refer To Pin Configuration For Additional Information Figure 2. ST63E69, T69 Block Diagram DEVICE EPROM (Bytes) OTPROM (Bytes) RAM (Bytes) EEPROM (Bytes) A/D 14-bit D/A 6-bit D/A TARGET ROM DEVICE ST63E69 8K 256 384 1 1 6 ST6369 ST63T69 8K 256 384 1 1 6 ST6369 Table 1. Device Summary ® ST63E69,ST63T69 57/67 |
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