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ST7263 数据表(PDF) 12 Page - STMicroelectronics |
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ST7263 数据表(HTML) 12 Page - STMicroelectronics |
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12 / 109 page  ST7263 12/109 Note 1. If the peripheral is present on the device (see Table 1 Device Summary) 0025h 0026h 0027h 0028h 0029h 002Ah 002Bh 002Ch 002Dh 002Eh 002Fh 0030h 0031h USB PIDR DMAR IDR ISTR IMR CTLR DADDR EP0RA EP0RB EP1RA EP1RB EP2RA EP2RB USB PID Register USB DMA address Register USB Interrupt/DMA Register USB Interrupt Status Register USB Interrupt Mask Register USB Control Register USB Device Address Register USB Endpoint 0 Register A USB Endpoint 0 Register B USB Endpoint 1 Register A USB Endpoint 1 Register B USB Endpoint 2 Register A USB Endpoint 2 Register B xxh xxh xxh 00h 00h xxxx 0110b 00h 0000 xxxxb 80h 0000 xxxxb 0000 xxxxb 0000 xxxxb 0000 xxxxb Read only R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W 0032h 0038h Reserved (7 Bytes) 0039h 003Ah 003Bh 003Ch 003Dh 003Eh 003Fh I2C1) DR OAR CCR SR2 SR1 CR I2C Data Register Reserved I2C (7 Bits) Slave Address Register I2C Clock Control Register I2C 2nd Status Register I2C 1st Status Register I2C Control Register 00h - 00h 00h 00h 00h 00h R/W R/W R/W Read only Read only R/W Address Block Register Label Register name Reset Status Remarks |
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