ST7263 datasheet(32/109 Pages) STMICROELECTRONICS

部件名	ST7263

功能描述	LOW SPEED USB 8-BIT MCU FAMILY with up to 16K MEMORY, up to 512 BYTES RAM, 8-BIT ADC, WDG, TIMER, SCI & I2C

PDF	109 Pages

Scroll/Zoom	100%

制造商	STMICROELECTRONICS [STMicroelectronics]

网页	http://www.st.com

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ST7263

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5.2 MISCELLANEOUS REGISTER

Address: 0009h

—

Read/Write

Reset Value: 1111 0000 (F0h)

Bit 7:4 = Reserved

Bit 3 = LVD

Low Voltage Detector.

This bit is set by software and only cleared by hard-

ware after a reset.

0: LVD enabled

1: LVD disabled

Bit 2 = CLKDIV

Clock Divider.

This bit is set by software and only cleared by hard-

ware after a reset. If this bit is set, it enables the use

of a 12 MHz external oscillator (refer to Figure 10

on page 17).

0: 24 MHz external oscillator

1: 12 MHz external oscillator.

Bit 1 = USBOE

USB enable.

If this bit is set, the port PC2 outputs the USB out-

put enable signal (at “1” when the ST7 USB is

transmitting data).

Unused bits 7-4 are set.

Bit 0 = MCO

Main Clock Out selection

This bit enables the MCO alternate function on the

PA0 I/O port. It is set and cleared by software.

0: MCO alternate function disabled (I/O pin free for

general-purpose I/O)

1: MCO alternate function enabled (fCPU on I/O

port)

LVD

CLKDIV USBOE

MCO

ST7263 数据表(PDF) 32 Page - STMicroelectronics

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