ADE7166 datasheet(99/148 Pages) AD

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Preliminary Technical Data

ADE75xx/ADE71xx

Rev. PrE | Page 99 of 148

09h

FP19

FP18

08h

FP17

FP16

07h

FP15

FP14

06h

FP13

FP12

05h

FP11

FP10

04h

FP9

FP8

03h

FP7

FP6

02h

FP5

FP4

01h

FP3

FP2

00h

FP1

FP0

COM# designates the common lines

FP# designates the segment lines

The LCD data memory is accessed indirectly through the LCD

Pointer SFR (LCDPTR, 0xAC)and Table 83. LCD Data SFR

(LCDDAT, 0xAE). Moving a value to the LCD Pointer SFR

(LCDPTR, 0xAC) selects the LCD data byte to be accessed and

initiates a read or write operation—see Table 82.

Writing to LCD Data registers

To update the LCD data memory, first set the LSB of the LCD

Configuration Y SFR (LCDCONY, 0xB1) to freeze the data

being displayed on the LCD while updating it. Then, move the

data to the LCD Data SFR (LCDDAT, 0xAE) prior to accessing

the LCD Pointer SFR (LCDPTR, 0xAC). When the MSB of the

LCD Pointer SFR (LCDPTR, 0xAC) is set, the content of the

LCD Data SFR (LCDDAT, 0xAE) is transferred to the internal

LCD data memory designated by the address in the LCD

Pointer SFR (LCDPTR, 0xAC). Clear the LSB of the LCD

Configuration Y SFR (LCDCONY, 0xB1) when all of the data

memory has been updated to allow to use the new LCD set up

for display.

Sample 8052 code to update the segments attached to pins FP10

and FP11 on is shown below:

ORL

LCDCONY,#01h

; start updating the data

MOV

LCDDATA,#FFh

MOV

LCDPTR,#80h OR 05h

ANL

LCDCONY,#0FEh ; update finished

Reading LCD Data registers

When the MSB of the LCD Pointer SFR (LCDPTR, 0xAC) is

cleared, the content of the LCD Data memory address

designated by LCDPTR are transferred to the LCD Data SFR

(LCDDAT, 0xAE).

Sample 8052 code to read the contents of LCD data memory

address 07h, which holds the on and off state of the segments

attached to FP14 and FP15, is shown below:

MOV

LCDPTR,#NOT 80h AND 07h

MOV

R1, LCDDATA

VOLTAGE GENERATION

The ADE75XX/ADE71XX provides two ways to generate the

LCD waveform voltage levels. The on-chip charge pump option

can generate 5V. This makes it possible to use 5V LCDs with the

3.3V ADE75XX/ADE71XX. There is also an option to use an

external resistor ladder with a 3.3V LCD. The EXTRES bit in

the LCD Configuration X SFR (LCDCONX, 0x9C) selects the

resistor ladder or charge pump option.

When selecting how to generate the LCD waveform voltages,

the following should be considered:

•

Power Consumption

•

Contrast Control

•

Lifetime Performance

Power Consumption

In most LCDs, a high amount of current is required when the

LCD waveforms change state. The external resistor ladder

option draws a constant amount of current whereas the charge

pump circuitry allows dynamic current consumption. If the

LCD module is used with the internal charge pump option,

when the display is disabled, the voltage generation is disabled,

so that no power is consumed by the LCD function. This feature

will result in significant power savings if the display is turned

off in battery operation.

Contrast control

The electrical characteristics of the liquid in the LCD change

over temperature, requiring adjustments in the LCD waveform

voltages to ensure a readable display. An added benefit of the

internal charge pump voltage generation is a configurable bias

voltage that can be compensated over temperature to maintain

contrast on the LCD. These compensations can be performed

based on the ADE75XX/ADE71XX temperature

measurements—see the Temperature, Battery and External

Voltage Measurements section. This dynamic contrast control is

not easily implemented with external resistor ladder voltage

generation.

The LCD bias voltage sets the contrast of the display when the

charge-pump provides the LCD waveform voltages. The

ADE75XX/ADE71XX provides 64 bias levels selectable using

the BLVL bits in the LCD Configuration X SFR (LCDCONX,

0x9C). The voltage level on LCDVA, LCDVB and LCDVC

depend on the the Interntal voltage reference value (Vref),

BLVL[5:0] selection and the biasing selected as described in

Table 76.

Lifetime Performance

DC offset on a segment will degrade its performance over time.

The voltages generated through the internal charge pump

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