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ADE7166 数据表(PDF) 26 Page - Analog Devices |
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ADE7166 数据表(HTML) 26 Page - Analog Devices |
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26 / 148 page ![]() ADE75xx/ADE71xx Preliminary Technical Data Rev. PrE | Page 26 of 148 6 METER_OFF 0 Set this bit to turn off the modulators and energy metering DSP circuitry to reduce power if metering functions are not needed in PSM0 5 RESERVED 0 4 COREOFF 0 Set this bit to shut down the core if in the PSM1 operating mode. 3 RESERVED Controls the core clock frequency, Fcore. Fcore=4.096MHz/2CD CD[2:0] Fcore (MHz) 0 0 0 4.096 0 0 1 2.048 0 1 0 1.024 0 1 1 0.512 1 0 0 0.256 1 0 1 0.128 1 1 0 0.064 2-0 CD[2:0] 010 1 1 1 0.032 Note: The POWCON register must be unlocked by first writing to the KYREG key register. The KYREG SFR is set to 0xA7 to unlock the POWCON SFR and then the POWCON SFR can be modified. For example: MOV KYREG,#0A7h ;Write KYREG to 0xA7 to get write access to the POWCON SFR MOV POWCON, #10H ;Shutdown the core POWER SUPPLY ARCHITECTURE ADE75XX/ADE71XX has two power supply inputs, VDD and VBAT, and requires only a single 3.3V power supply at VDD for full operation. A battery backup, or secondary power supply, with a maximum of 3.6V can be connected to the VBAT input. Internally, the ADE75XX/ADE71XX connects VDD or VBAT to VSW, which is used to derive the power for the ADE75XX/ADE71XX circuitry. The VSWOUT output pin reflects the voltage at VSW, and has a maximum output current of TBD mA. This pin may also be used to power a limited number of peripheral components. The 2.5V analog supply, VINTA and the 2.5V supply for the core logic, VINTD, are derived by on-chip linear regulators from VSW. Figure 9 shows the power supply architecture of ADE75XX/ADE71XX. The ADE75XX/ADE71XX provides automatic battery switchover between VDD and VBAT based on the voltage level detected at VDD or VDCIN. Additionally, the BCTRL input can also be used to trigger a battery switchover. The conditions for switching VSW from VDD to VBAT and back to VDD are described in the Battery Switchover section. VDCIN is an input pin that can be connected to a 0V to 3.3V DC signal. This input is intended for power supply supervisory purposes and does not provide power to the ADE75XX/ADE71XX circuitry - see Battery Switchover section. MCU SCRATCHPAD LCD RTC TEMPERATURE ADC DCIN V DD V INTD V INTA V 3.3V 2.5V LDO BAT V SWOUT V BCTRL SW V ADE SPI/I2C UART LDO POWER SUPPLY MANAGEMENT ADC ADC Figure 9: Power Supply Architecture BATTERY SWITCHOVER ADE75XX/ADE71XX monitors VDD, VBAT, and VDCIN. Automatic battery switchover from VDD to VBAT can be configured based on the status of VDD, VDCIN, or the BCTRL pin. Battery switchover is enabled by default. Setting bit 1 in the Battery Switchover Configuration SFR (BATPR, 0xF5), disables battery switchover so that VDD is always connected to VSW. The source of VSW is indicated by bit 6 in the Peripheral Configuration SFR (PERIPH, 0xF4), which is set when VSW is connected to VDD and cleared when VSW is connected to VBAT. The battery switchover functionality provided by the ADE75XX/ADE71XX allows a seamless transition from VDD to VBAT. An automatic battery switchover option ensures a stable power supply to the ADE75XX/ADE71XX, as long as the external battery voltage is above TBD V. It allows continuous code execution even while the internal power supply is switching from VDD to VBAT and back. Note that the energy metering ADCs are not available when VBAT is being used for |
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