®

STPC CONSUMER-S

PC Compatible Embeded Microprocessor

ADVANCED DATA

1/51

29/10/99

Release B

This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.

Figure 1. Logic Diagram

s

POWERFUL x86 PROCESSOR

s

64-BIT 66MHz SDRAM UMA CONTROLLER

s

VGA & SVGA CRT CONTROLLER

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2D GRAPHICS ENGINE

s

VIDEO INPUT PORT

s

VIDEO PIPELINE

- UP-SCALER

- VIDEO COLOR SPACE CONVERTER

- CHROMA & COLOUR KEY SUPPORT

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TV OUTPUT

- 3-LINE FLICKER FILTER

- CCIR 601/656 SCAN CONVERTER

- NTSC / PAL COMPOSITE, RGB, S-VIDEO

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PCI MASTER / SLAVE CONTROLLER

s

ISA MASTER / SLAVE CONTROLLER

s

INTEGRATED PERIPHERAL CONTROLLER

- DMA CONTROLLER

- INTERRUPT CONTROLLER

- TIMER / COUNTERS

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OPTIONAL 16-BIT LOCAL BUS INTERFACE

s

EIDE CONTROLLER

s

I C INTERFACE

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POWER MANAGEMENT UNIT

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3.3V OPERATION

STPC CONSUMER-S OVERVIEW

The STPC Consumer-S integrates a standard 5th

generation x86 core, a Synchronous DRAM con-

troller, a graphics subsystem, a video input port,

video pipeline, and support logic including PCI,

ISA, and IDE controllers to provide a single con-

sumer orientated PC compatible subsystem on a

single device.

The device is based on a tightly coupled Unified

Memory Architecture (UMA), sharing the same

memory array between the CPU main memory

and the graphics and video frame buffers.

The STPC Consumer-S is packaged in a 388

Plastic Ball Grid Array (PBGA).

PBGA388

x86

Core

Host

I/F

SDRAM

CTRL

SVGA

GE

VIP

PCI

m/s

LB

CTR

PCI Bus

ISA

m/s

IPC

PCI

m/s

ISA Bus

CRTC

Cursor

Moni tor

TV

IDE

I/F

PMU

W.dog

Video

Pipeline

C Key

K Key

LUT

Local Bus

Encoder

TVO