PIN DESCRIPTION

21/51

Release B

This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.

Table 2.3. ISA / IDE dynamic multiplexing

.

Table 2.4. ISA / Local Bus pin sharing

.

ISA BUS

(ISAOE# = 0)

IDE

(ISAOE# = 1)

RMRTCCS#

DD[15]

KBCS#

DD[14]

RTCRW#

DD[13]

RTCDS

DD[12]

SA[19:8]

DD[11:0]

LA[23]

SCS3#

LA[22]

SCS1#

SA[21]

PCS3#

SA[20]

PCS1#

LA[19:17]

DA[2:0]

IOCHRDY

DIORDY

ISA / IPC

LOCAL BUS

SD[15:0]

PD[15:0]

DREQ_MUX[1:0]

PA[21:20]

SMEMR#

PA[19]

MEMW#

PA[18]

BHE#

PA[17]

AEN

PA[16]

ALE

PA[15]

MEMR#

PA[14]

IOR#

PA[13]

IOW #

PA[12]

REF#

PA[11]

IOCHCK#

PA[10]

GPIO CS#

PA[9]

ZWS#

PA[8]

SA[7:4]

PA[7:4]

TC, DACK_ENC[2:0]

PA[3:0]

SA[3]

PRDY

ISAOE#,SA[2:0]

IOCS#[3:0]

DEV_CLK, RTCAS#

FCS#[1:0]

IOCS16#, MASTER#

PRD#[1:0]

SMEMW#, MCS16#

PWR#[1:0]

ISACLK, ISA_CLK2X

Figure 2.2. Typical ISA/IDE Demultiplexing

MASTER#

74LS245

RMRTCCS#

AB

DIR

OE

ISAOE#

KBCS#

RTCRW#

RTCDS

SA[19:8]

STPC bus / DD[15:0]

LA[22]

LA[23]

LA[22]

LA[23]

SCS1#

SCS3#

PCS1#

PCS3#