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M32C/86 数据表(PDF) 338 Page - Renesas Technology Corp |
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M32C/86 数据表(HTML) 338 Page - Renesas Technology Corp |
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338 / 505 page ![]() Page 315 9 7 4 f o 5 0 0 2 , 8 0 . p e S 0 0 . 1 . v e R 0 0 1 0 - 4 0 2 0 B 9 0 J E R 23. CAN Module ) T 6 8 / C 2 3 M , 6 8 / C 2 3 M ( p u o r G 6 8 / C 2 3 M Figure 23.1 shows a block diagram of the CAN module. Figure 23.2 shows CANi message slot (the mes- sage slot) j (j = 0 to 15) and CANi message slot buffer (i=0, 1). Table 23.2 lists pin settings of the CAN module. The message slot cannot be accessed directly from the CPU. Allocate the message slot j to be used to the message slot buffer 0 or 1. The message slot j is accessed via the message slot buffer address. The CiSBS register selects the message slot j to be allocated. Figure 23.2 shows the 16-byte message slot buffer and message slot. Figure 23.1 CAN Module Block Diagram CAN0 Message Slot Buffer 0,1 Acceptance Filter CAN0IN Interrupt Request Interrupt Request CAN0OUT Baud Rate Prescaler Internal Data Bus Self-test Function CAN Protocol Controller Message Slots 0 to 15 CAN Interrupt Control Circuit CAN1 CAN1IN CAN1OUT Message Slot Buffer 0,1 Acceptance Filter Baud Rate Prescaler CAN Protocol Controller Message Slots 0 to 15 CAN Interrupt Control Circuit Self-test Function f1 CAN Clock "0" fCAN "1" PM25 See Figure 23.2 f1 CAN Clock "0" fCAN "1" PM25 See Figure 23.2 |
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