M32CSLASH86 datasheet(345/505 Pages) RENESAS

345 / 505 page

Page 322

23. CAN Module

)

(

SLEEP

(b7 - b1)

CANi Sleep Control Register (i=0, 1)

Symbol

Address

After Reset

C0SLPR

024216

XXXX XXX02

C1SLPR

025216

XXXX XXX02

Sleep Mode Control Bit

0 : Enters sleep mode

1 : Exits sleep mode(1)

Bit Name

Function

Bit

Symbol

Nothing is assigned. When write, set to "0".

When read, its content is indeterminate.

NOTES:

1. Set up the initial setting for the CAN module after CAN sleep mode is exited. While the CAN0 module

is in sleep mode, no SFR (addresses 01E016 to 024516) for CAN0, except the C0SLPR register, can

be accessed. While the CAN1 module is in sleep mode, no SFR (addresses 025016 to 02BF16) for

CAN1, except the C1SLPR register, can be accessed.

23.1.3 CANi Sleep Control Register (CiSLPR Register) (i=0, 1)

Figure 23.5 C0SLPR and C1SLPR Registers

23.1.3.1 SLEEP Bit

When the SLEEP bit is set to "0", the clock supplied to the CAN module stops running and the CAN

module enters sleep mode.

When the SLEEP bit is set to "1", the clock supplied to the CAN module starts running and the CAN

module exits sleep mode.

NOTES:

1. Enter sleep mode after the STATE_RESET bit in the CiSTR register is set to "1" (CAN module

reset completed).

M32C/86 数据表(PDF) 345 Page - Renesas Technology Corp

M32C/86 数据表(HTML) 345 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

数据表下载