M32CSLASH86 datasheet(110/505 Pages) RENESAS

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9. Clock Generation Circuit

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9.5 Power Consumption Control

Normal operating mode, wait mode and stop mode are provided as the power consumption control.

All mode states, except wait mode and stop mode, are called normal operating mode in this section. Figure

9.13 shows a block diagram of status transition in wait mode and stop mode. Figure 9.14 shows a block

diagram of status transition in all modes.

9.5.1 Normal Operating Mode

The normal operating mode is further separated into six modes.

In normal operating mode, the CPU clock and peripheral function clock are supplied to operate the CPU

and peripheral function. The power consumption control is enabled by controlling a CPU clock fre-

quency. The higher the CPU clock frequency is, the more processing power increases. The lower the

CPU clock frequency is, the more power consumption decreases. When unnecessary oscillation circuit

stops, power consumption is further reduced.

9.5.1.1 High-Speed Mode

The main clock(1) becomes the CPU clock and a clock source of the peripheral function clock. When

the sub clock runs, fC32 can be used as a count source for the timers A and B.

9.5.1.2 Medium-Speed Mode

The main clock(1) divided-by-2, -3, -4, -6, -8, -10, -12, -14, or -16 becomes the CPU clock. The main

clock(1) is a clock source for the peripheral function clock. When the sub clock runs, fC32 can be used

as a count source for the timers A and B.

9.5.1.3 Low-Speed Mode

The sub clock becomes the CPU clock . The main clock(1) is a clock source for the peripheral function

clock. fC32 can be used as a count source for the timers A and B.

9.5.1.4 Low-Power Consumption Mode

The microcomputer enters low-power consumption mode when the main clock stops in low-speed

mode. The sub clock becomes the CPU clock. Only fC32 can be used as a count source for the timers

A and B and the peripheral function clock. In low-power consumption mode, the MCD4 to MCD0 bits

in the MCD register are set to "010002" (divide-by-8 mode). Therefore, when the main clock resumes

running, the microcomputer is in midium-speed mode (divide-by-8 mode).

9.5.1.5 On-Chip Oscillator Mode

The on-chip oscillator clock divided-by-1 (no division), -2, -3, 4-, -6, -8, -10, -12, -14, or -16 becomes

the CPU clock. The on-chip oscillator clock is a clock source for the peripheral function clock. When

the sub clock runs, fC32 can be used as a count source for the timers A and B.

9.5.1.6 On-Chip Oscillator Low-Power Consumption Mode

The microcomputer enters on-chip oscillator low-power consumption mode when the main clock stops

in on-chip oscillator mode . The on-chip oscillator clock divided-by-1 (no division), -2, -3, -4, -6, -8, -10, -

12, -14, or -16 becomes the CPU clock. The on-chip oscillator clock is a clock source for the peripheral

function clock. When the sub clock runs, fC32 can be used as a count source for the timers A and B.

NOTES:

1. The PLL clock, instead of the main clock, when the CM17 bit is set to "1" (PLL clock).

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