M32CSLASH86 datasheet(190/505 Pages) RENESAS

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Page 167

15. Timer (Timer B)

)

(

15.2.2 Event Counter Mode

In event counter mode, the timer counts how many external signals are applied or how many times

another timer overflows and underflows. (See Table 15.10) Figure 15.21 shows the TBiMR register (i=0

to 5) in event counter mode.

Table 15.10 Event Counter Mode Specifications

Item

Specification

Count Source

• External signal applied to the TBiIN pin (i = 0 to 5) (valid edge can be selected by

program)

• TBj overflow or underflow signal (j=i-1, except j=2 when i=0, j=5 when i=3)

Counting Operation

• The timer decrements a counter value

When the timer counter underflows, content of the reload register is reloaded into the

count register to continue counting

Divide Ratio

1/(n+1)

n : setting value of the TBi register

000016 to FFFF16

Counter Start Condition

The TBiS bits in the TABSR and TBSR register are set to "1" (starts counting)

Counter Stop Condition

The TBiS bit is set to "0" (stops counting)

Interrupt Request Generation Timing The timer counter underflows

TBiIN Pin Function

Programmable I/O port or count source input

Read from Timer

The TBi register indicates counter value

Write to Timer

• When the timer counter stops, the value written to the TBi register is also written to

both reload register and counter

• While counting, the value written to the TBi register is written to the reload register

(It is transferred to the counter at the next reload timing)

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