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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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H8/3028F 数据表(PDF) 340 Page - Renesas Technology Corp |
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H8/3028F 数据表(HTML) 340 Page - Renesas Technology Corp |
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340 / 923 page  Rev. 2.00, 09/03, page 310 of 890 • Output triggering of programmable timing pattern controller (TPC) Compare match/input capture signals from channels 0 to 2 can be used as TPC output triggers. Table 9.1 summarizes the 16-bit timer functions. Table 9.1 16-bit timer Functions Item Channel 0 Channel 1 Channel 2 Clock sources Internal clocks: φ, φ/2, φ/4, φ/8 External clocks: TCLKA, TCLKB, TCLKC, TCLKD, selectable independently General registers (output compare/input capture registers) GRA0, GRB0 GRA1, GRB1 GRA2, GRB2 Input/output pins TIOCA0, TIOCB0 TIOCA1, TIOCB1 TIOCA2, TIOCB2 Counter clearing function GRA0/GRB0 compare match or input capture GRA1/GRB1 compare match or input capture GRA2/GRB2 compare match or input capture Initial output value setting function Available Available Available Compare 0 Available Available Available match output 1 Available Available Available Toggle Available Available Not available Input capture function Available Available Available Synchronization Available Available Available PWM mode Available Available Available Phase counting mode Not available Not available Available Interrupt sources Three sources • Compare match/input capture A0 • Compare match/input capture B0 • Overflow Three sources • Compare match/input capture A1 • Compare match/input capture B1 • Overflow Three sources • Compare match/input capture A2 • Compare match/input capture B2 • Overflow |
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