H8SLASH3028F datasheet(70/923 Pages) RENESAS

部件名	H8/3028F

功能描述	Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

PDF	923 Pages

Scroll/Zoom	100%

制造商	RENESAS [Renesas Technology Corp]

网页	http://www.renesas.com

标志

70 / 923 page

Rev. 2.00, 09/03, page 40 of 890

Execution of BCLR Instruction

BCLR #0, @P4DDR ;Clear bit 0 in data direction register

After Execution of BCLR Instruction

P47

P46

P45

P44

P43

P42

P41

P40

Input/output

Output

Input

DDR

111

Explanation: To execute the BCLR instruction, the CPU begins by reading P4DDR. Since

P4DDR is a write-only register, it is read as H'FF, even though its true value is H'3F.

Next the CPU clears bit 0 of the read data, changing the value to H'FE.

Finally, the CPU writes this value (H'FE) back to P4DDR to complete the BCLR instruction.

As a result, P40DDR is cleared to 0, making P40 an input pin. In addition, P47DDR and P46DDR

are set to 1, making P47 and P46 output pins.

The BCLR instruction can be used to clear flags in the on-chip registers to 0. In an interrupt-

handling routine, for example, if it is known that the flag is set to 1, it is not necessary to read the

flag ahead of time.

H8/3028F 数据表(PDF) 70 Page - Renesas Technology Corp