H8SLASH3028F datasheet(15/923 Pages) RENESAS

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Rev. 2.00, 09/03, page xv of xxx

Item

Page

Revision (See Manual for Details)

Table 21.12

Permissible Output

Currents

663

Conditions amended

Conditions: VCC = 3.0 V to 3.6 V, AVCC = 3.0 V to 3.6 V, VREF = 3.0 V to

AVCC, VSS = AVSS = 0 V, Ta = –20°C to +75°C (regular

specifications), Ta = –40°C to +85°C (wide-range

specifications)

21.2.3 AC

Characteristics

Table 21.13 Clock

Timing

Table 21.14 Control

Signal Timing

665

Conditions amended

Conditions: VCC = 3.0 V to 3.6 V, AVCC = 3.0 V to 3.6 V, VREF = 3.0 V to

AVCC, VSS = AVSS = 0 V, Ta = –20°C to +75°C (regular

specifications), Ta = –40°C to +85°C (wide-range

specifications)

Table 21.15 Bus

Timing

666,

667

Conditions amended

Conditions: VCC = 3.0 V to 3.6 V, AVCC = 3.0 V to 3.6 V, VREF = 3.0 V to

AVCC, VSS = AVSS = 0 V, Ta = –20°C to +75°C (regular

specifications), Ta = –40°C to +85°C (wide-range

specifications)

Table amended

Row address hold time

Table 21.16 Timing of

On-Chip Supporting

Modules

668

Conditions amended

Conditions: VCC = 3.0 V to 3.6 V, AVCC = 3.0 V to 3.6 V, VREF = 3.0 V to

AVCC, VSS = AVSS = 0 V, Ta = –20°C to +75°C (regular

specifications), Ta = –40°C to +85°C (wide-range

specifications)

21.2.4 A/D Conversion

Characteristics

Table 21.17 A/D

Conversion

Characteristics

670

Conditions amended

Conditions: VCC = 3.0 V to 3.6 V, AVCC = 3.0 V to 3.6 V, VREF = 3.0 V to

AVCC, VSS = AVSS = 0 V, Ta = –20°C to +75°C (regular

specifications), Ta = –40°C to +85°C (wide-range

specifications)

Table amended

Conversion time:

70 states*

Permissible signal-

source impedance

φ ≤ 13 MHz — — 5

Ω

21.2.5 D/A Conversion

Characteristics

Table 21.18 D/A

Conversion

Characteristics

671

Conditions amended

Conditions: VCC = 3.0 V to 3.6 V, AVCC = 3.0 V to 3.6 V, VREF = 3.0 V to

AVCC, VSS = AVSS = 0 V, Ta = –20°C to +75°C (regular

specifications), Ta = –40°C to +85°C (wide-range

specifications)

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