H8SLASH3028F datasheet(346/923 Pages) RENESAS

346 / 923 page

Rev. 2.00, 09/03, page 316 of 890

Channel

Address*

Name

Abbre-

viation

R/W

Initial

Value

H'FFF78

Timer control register 2

16TCR2

R/W

H'80

H'FFF79

Timer I/O control register 2

TIOR2

R/W

H'88

H'FFF7A

Timer counter 2H

16TCNT2H R/W

H'00

H'FFF7B

Timer counter 2L

16TCNT2L

R/W

H'00

H'FFF7C

General register A2H

GRA2H

R/W

H'FF

H'FFF7D

General register A2L

GRA2L

R/W

H'FF

H'FFF7E

General register B2H

GRB2H

R/W

H'FF

H'FFF7F

General register B2L

GRB2L

R/W

H'FF

Notes: 1. The lower 20 bits of the address in advanced mode are indicated.

2. Only 0 can be written in bits 3 to 0, to clear the flags.

9.2

9.2.1

Timer Start Register (TSTR)

TSTR is an 8-bit readable/writable register that starts and stops the timer counter (16TCNT) in

channels 0 to 2.

Bit

Initial value

Read/Write

—

STR2

R/W

STR1

R/W

STR0

R/W

Reserved bits

Counter start 2 to 0

These bits start and

stop 16TCNT2 to 16TCNT0

TSTR is initialized to H'F8 by a reset and in standby mode.

Bits 7 to 3—Reserved: These bits cannot be modified and are always read as 1.

Bit 2—Counter Start 2 (STR2): Starts and stops timer counter 2 (16TCNT2).

Bit 2

STR2

Description

16TCNT2 is halted

(Initial value)

16TCNT2 is counting

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