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H8/3028F 数据表(PDF) 407 Page - Renesas Technology Corp |
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H8/3028F 数据表(HTML) 407 Page - Renesas Technology Corp |
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407 / 923 page ![]() Rev. 2.00, 09/03, page 377 of 890 10.1.4 Register Configuration Table 10.2 summarizes the registers of the 8-bit timer module. Table 10.2 8-Bit Timer Registers Channel Address* 1 Name Abbreviation R/W Initial value 0 H'FFF80 Timer control register 0 8TCR0 R/W H'00 H'FFF82 Timer control/status register 0 8TCSR0 R/(W)* 2 H'00 H'FFF84 Time constant register A0 TCORA0 R/W H'FF H'FFF86 Time constant register B0 TCORB0 R/W H'FF H'FFF88 Timer counter 0 8TCNT0 R/W H'00 1 H'FFF81 Timer control register 1 8TCR1 R/W H'00 H'FFF83 Timer control/status register 1 8TCSR1 R/(W)* 2 H'00 H'FFF85 Time constant register A1 TCORA1 R/W H'FF H'FFF87 Time constant register B1 TCORB1 R/W H'FF H'FFF89 Timer counter 1 8TCNT1 R/W H'00 2 H'FFF90 Timer control register 2 8TCR2 R/W H'00 H'FFF92 Timer control/status register 2 8TCSR2 R/(W)* 2 H'10 H'FFF94 Time constant register A2 TCORA2 R/W H'FF H'FFF96 Time constant register B2 TCORB2 R/W H'FF H'FFF98 Timer counter 2 8TCNT2 R/W H'00 3 H'FFF91 Timer control register 3 8TCR3 R/W H'00 H'FFF93 Timer control/status register 3 8TCSR3 R/(W)* 2 H'00 H'FFF95 Time constant register A3 TCORA3 R/W H'FF H'FFF97 Time constant register B3 TCORB3 R/W H'FF H'FFF99 Timer counter 3 8TCNT3 R/W H'00 Notes: 1. Indicates the lower 20 bits of the address in advanced mode. 2. Only 0 can be written to bits 7 to 5, to clear these flags. Each pair of registers for channel 0 and channel 1 comprises a 16-bit register with the channel 0 register as the upper 8 bits and the channel 1 register as the lower 8 bits, so they can be accessed together by word access. Similarly, each pair of registers for channel 2 and channel 3 comprises a 16-bit register with the channel 2 register as the upper 8 bits and the channel 3 register as the lower 8 bits, so they can be accessed together by word access. |
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