H8SLASH3028F datasheet(424/923 Pages) RENESAS

部件名	H8/3028F

功能描述	Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

PDF	923 Pages

Scroll/Zoom	100%

制造商	RENESAS [Renesas Technology Corp]

网页	http://www.renesas.com

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424 / 923 page

Rev. 2.00, 09/03, page 394 of 890

Input capture signal

Input capture input

8TCNT

TCORB

Figure 10.13 Timing of Input Capture Input Signal

10.4.4

Timing of Status Flag Setting

Timing of CMFA/CMFB Flag Setting when Compare Match Occurs: The CMFA and CMFB

flags in 8TCSR are set to 1 by the compare match signal output when the TCORA or TCORB and

8TCNT values match. The compare match signal is generated in the last state of the match (when

the matched 8TCNT count value is updated). Therefore, after the 8TCNT and TCORA or

TCORB values match, the compare match signal is not generated until an incrementing clock

pulse signal is generated. Figure 10.14 shows the timing in this case.

CMF

Compare match signal

8TCNT

N+1

TCOR

Figure 10.14 CMF Flag Setting Timing when Compare Match Occurs

Timing of CMFB Flag Setting when Input Capture Occurs: On generation of an input capture

signal, the CMFB flag is set to 1 and at the same time the 8TCNT value is transferred to TCORB.

Figure 10.15 shows the timing in this case.

H8/3028F 数据表(PDF) 424 Page - Renesas Technology Corp