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H8/3028F 数据表(PDF) 481 Page - Renesas Technology Corp |
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H8/3028F 数据表(HTML) 481 Page - Renesas Technology Corp |
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481 / 923 page ![]() Rev. 2.00, 09/03, page 451 of 890 13.1.2 Block Diagram Figure 13.1 shows a block diagram of the SCI. RDR RSR TDR TSR SSR SCR SMR SCMR BRR φ/ 4 φ/16 φ/64 RxD TxD SCK TEI TXI RXI ERI Legend RSR : Receive shift register RDR : Receive data register TSR : Transmit shift register TDR : Transmit data register SMR : Serial mode register SCR : Serial control register SSR : Serial status register BRR : Bit rate register SCMR : Smart card mode register Module data bus Internal data bus Parity generate Parity check Transmit/receive control Baud rate generator Clock External clock φ Figure 13.1 SCI Block Diagram |
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