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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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H8/3028F 数据表(PDF) 595 Page - Renesas Technology Corp |
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H8/3028F 数据表(HTML) 595 Page - Renesas Technology Corp |
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595 / 923 page  Rev. 2.00, 09/03, page 565 of 890 16.2.3 D/A Standby Control Register (DASTCR) DASTCR is an 8-bit readable/writable register that enables or disables D/A output in software standby mode. Bit Initial value Read/Write 7 — 1 — 6 — 1 — 5 — 1 — 4 — 1 — 3 — 1 — 0 DASTE 0 R/W 2 — 1 — 1 — 1 — Reserved bits D/A standby enable Enables or disables D/A output in software standby mode DASTCR is initialized to H'FE by a reset and in hardware standby mode. It is not initialized in software standby mode. Bits 7 to 1—Reserved: These bits cannot be modified and are always read as 1. Bit 0—D/A Standby Enable (DASTE): Enables or disables D/A output in software standby mode. Bit 0 DASTE Description 0 D/A output is disabled in software standby mode (Initial value) 1 D/A output is enabled in software standby mode |
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