数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

H8/3028F 数据表(PDF) 635 Page - Renesas Technology Corp

部件名 H8/3028F
功能描述  Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series
PDF  923 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

H8/3028F 数据表(HTML) 635 Page - Renesas Technology Corp

Back Button H8/3028F Datasheet HTML 631Page - Renesas Technology Corp H8/3028F Datasheet HTML 632Page - Renesas Technology Corp H8/3028F Datasheet HTML 633Page - Renesas Technology Corp H8/3028F Datasheet HTML 634Page - Renesas Technology Corp H8/3028F Datasheet HTML 635Page - Renesas Technology Corp H8/3028F Datasheet HTML 636Page - Renesas Technology Corp H8/3028F Datasheet HTML 637Page - Renesas Technology Corp H8/3028F Datasheet HTML 638Page - Renesas Technology Corp H8/3028F Datasheet HTML 639Page - Renesas Technology Corp Next Button
Zoom Inzoom in Zoom Outzoom out
 635 / 923 page
background image
Rev. 2.00, 09/03, page 605 of 890
START
End of programming
Set SWE bit in FLMCR1
Start of programming
Write pulse application subroutine
Wait (tsswe) µs
Sub-Routine Write Pulse
End Sub
Set PSU bit in FLMCR1
WDT enable
Disable WDT
Number of Writes (n)
1
2
3
4
5
6
7
8
9
10
11
12
13
998
999
1000
Note 6: Write Pulse Width
Write Time (tsp)
µs
30
30
30
30
30
30
200
200
200
200
200
200
200
200
200
200
Wait (tspsu) µs
Set P bit in FLMCR1
Wait (tsp) µs
Clear P bit in FLMCR1
Wait (tcp) µs
Clear PSU bit in FLMCR1
Wait (tcpsu) µs
n= 1
m= 0
NG
NG
NG
NG
OK
OK
OK
Wait (tspv) µs
Wait (tspvr) µs
*2
*7
*7
*4
*7
*7
Start of programming
Programming halted
*5*7
*7
*7
*1
Wait (tcpv) µs
Write pulse
Sub-Routine-Call
Set PV bit in FLMCR1
H'FF dummy write to verify address
Read verify data
Write data =
verify data?
*4
*3
*7
*7
*7
*1
Transfer reprogram data to reprogram data area
Reprogram data computation
*4
Transfer additional-programming data to
additional-programming data area
Additional-programming data computation
Clear PV bit in FLMCR1
Clear SWE bit in FLMCR1
m = 1
Reprogram
See Note 6 for pulse width
m= 0 ?
Increment address
Programming failure
OK
Clear SWE bit in FLMCR1
Wait (tcswe) µs
NG
OK
6
≥ n?
NG
OK
6
≥ n ?
Wait (tcswe) µs
n
≥ N?
n
← n + 1
Original Data
(D)
Verify Data
(V)
Reprogram Data
(X)
Comments
Programming completed
Still in erased state; no action
Programming incomplete;
reprogram
Note: Use a 10
µs write pulse for additional programming.
Consecutively write 128-byte data in reprogram
data area in RAM to flash memory
RAM
Program data storage
area (128 bytes)
Reprogram data storage
area (128 bytes)
Additional-programming
data storage area
(128 bytes)
Store 128-byte program data in program
data area and reprogram data area
Write Pulse (Additional programming)
Sub-Routine-Call
128-byte
data verification completed?
Consecutively write 128-byte data in additional-
programming data area in RAM to flash memory
Reprogram Data Computation Table
Reprogram Data
(X')
Verify Data
(V)
Additional-
Programming Data (Y)
1
1
1
1
0
1
0
0
0
0
1
1
Comments
Additional programming
to be executed
Additional programming
not to be executed
Additional programming
not to be executed
Additional programming
not to be executed
0
1
1
1
0
1
0
1
0
0
1
1
Additional-Programming Data Computation Table
Perform programming in the erased state.
Do not perform additional programming
on previously programmed addresses.
Notes: 1. Data transfer is performed by byte transfer. The lower 8 bits of the first address written to must be H'00 or H'80.
A 128-byte data transfer must be performed even if writing fewer than 128 bytes; in this case, H'FF data must be written to the extra addresses.
2. Verify data is read in 16-bit (word) units.
3. Reprogram data is determined by the operation shown in the table below (comparison between the data stored in the program data area and the verify data). Bits for
which the reprogram data is 0 are programmed in the next reprogramming loop. Therefore, even bits for which programming has been completed will be subjected to
programming once again if the result of the subsequent verify operation is NG.
4. A 128-byte area for storing program data, a 128-byte area for storing reprogram data, and a 128-byte area for storing additional-programming data must be provided in
RAM. The contents of the reprogram data area and additional-programming data area are modified as programming proceeds.
5. A write pulse of 30
µs or 200 µs is applied according to the progress of the programming operation. See Note 6 for details of the pulse widths. When writing of
additional-programming data is executed, a 10
µs write pulse should be applied. Reprogram data X' means reprogram data when the write pulse is applied.
7. The wait times and value of N are shown in section 21.2.6, Flash Memory Characteristics.
Figure 18.10 Program/Program-Verify Flowchart (128-Byte Programming)



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com