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H8/3028F 数据表(PDF) 740 Page - Renesas Technology Corp |
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H8/3028F 数据表(HTML) 740 Page - Renesas Technology Corp |
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740 / 923 page ![]() Rev. 2.00, 09/03, page 710 of 890 Table A.3 Number of States per Cycle Access Conditions External Device On-Chip Sup- porting Module 8-Bit Bus 16-Bit Bus Execution State (Cycle) On-Chip Memory 8-Bit Bus 16-Bit Bus 2-State Access 3-State Access 2-State Access 3-State Access Instruction fetch SI 2 6346 + 2m 23 + m Branch address read SJ Stack operation SK Byte data access SL 32 3 + m Word data access SM 64 6 + 2m Internal operation SN 1 Legend m: Number of wait states inserted into external device access |
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