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H8/3028F 数据表(PDF) 840 Page - Renesas Technology Corp

部件名 H8/3028F
功能描述  Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series
PDF  923 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

H8/3028F 数据表(HTML) 840 Page - Renesas Technology Corp

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Rev. 2.00, 09/03, page 810 of 890
TCR2—Timer Control Register 2
H'FFF90
8-bit timer channel 2
TCR3—Timer Control Register 3
H'FFF91
8-bit timer channel 3
Bit
Initial value
Read/Write
0
R/W
7
CMIEB
0
R/W
6
CMIEA
0
R/W
5
OVIE
0
R/W
4
CCLR1
0
R/W
3
CCLR0
0
R/W
2
CKS2
0
R/W
1
CKS1
0
R/W
0
CKS0
Clock select 2 to 0
0
0
0
1
0
1
0
0
1
1
0
1
1
Clock input is disabled
Internal clock, counted on rising edge
of
φ/8
Internal clock, counted on rising edge
of
φ/64
Internal clock, counted on rising edge
of
φ/8192
External clock, counted on falling edge
External clock, counted on rising edge
External clock, counted on both
rising and falling edges
Counter clear 1 and 0
0
0
1
0
1
Clearing is disabled
Cleared by compare match A
Cleared by compare match B/input capture B
Cleared by input capture B
1
Timer overflow interrupt enable
0
1
OVI interrupt requested by OVF is disabled
OVI interrupt requested by OVF is enabled
Compare match interrupt enable A
0
1
CMIA interrupt requested by CMFA is disabled
CMIA interrupt requested by CMFA is enabled
Compare match interrupt enable B
0
1
CMIB interrupt requested by CMFB is disabled
CMIB interrupt requested by CMFB is enabled
1
CSK2 CSK1 CSK0
Description
Channel 2:
Count on TCNT3 overflow signal
*
Channel 3:
Count on TCNT2 compare match A
*
Note:
* If the clock input of channel 2 is the TCNT3 overflow
signal and that of channel 3 is the TCNT2 compare
match signal, no incrementing clock is generated.
Do not use this setting.



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