PSD913F2 datasheet(9/91 Pages) STMICROELECTRONICS

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PSD9XX Family

PSD935G2

The following table describes the pin names and pin functions of the PSD935G2. Pins that

have multiple names and/or functions are defined using PSD Configuration.

6.0

Table 5.

PSD935G2

Descriptions

Pin*

(TQFP

Pin Name

Pkg.)

Type

Description

ADIO0-7

3-7

I/O

This is the lower Address/Data port. Connect your MCU

10-12

address or address/data bus according to the following rules:

1. If your MCU has a multiplexed address/data bus where the

data is multiplexed with the lower address bits, connect

AD[0:7] to this port.

2. If your MCU does not have a multiplexed address/data bus,

connect A[0:7] to this port.

3. If you are using an 80C51XA in burst mode, connect

A4/D0 through A11/D7 to this port.

ALE or AS latches the address. The PSD drives data out only

if the read signal is active and one of the PSD functional blocks

was selected. The addresses on this port are passed to the

PLDs.

ADIO8-15

13-20

I/O

This is the upper Address/Data port. Connect your MCU

address or address/data bus according to the following rules:

1. If your MCU has a multiplexed address/data bus where the

data is multiplexed with the lower address bits, connect

A[8:15] to this port.

2. If your MCU does not have a multiplexed address/data bus,

connect A[8:15] to this port.

3. If you are using an 80C251 in page mode, connect AD[8:15]

to this port

4. If you are using an 80C51XA in burst mode, connect

A[12:19] to this port.

ALE or AS latches the address. The PSD drives data out only

if the read signal is active and one of the PSD functional

blocks was selected. The addresses on this port are passed

to the PLDs.

CNTL0

The following control signals can be connected to this port,

based on your MCU:

1. WR — active-low write input.

2. R_W — active-high read/active low write input.

This pin is connected to the PLDs. Therefore, these signals can

be used in decode and other logic equations.

CNTL1

The following control signals can be connected to this port,

based on your MCU:

1. RD — active-low read input.

2. E — E clock input.

3. DS — active-low data strobe input.

4. PSEN — connect PSEN to this port when it is being used as

an active-low read signal. For example, when the 80C251

outputs more than 16 address bits, PSEN is actually the read

signal.

This pin is connected to the PLDs. Therefore, these signals can

be used in decode and other logic equations.

CNTL2

This pin can be used to input the PSEN (Program Select

Enable) signal from any MCU that uses this signal for code

exclusively. If your MCU does not output a Program Select

Enable signal, this port can be used as a generic input. This

port is connected to the PLD as input.

Reset

Active low input. Resets I/O Ports, PLD Micro

⇔Cells, some of

the configuration registers and JTAG registers. Must be active

at power up. Reset also aborts the Flash programming/erase

cycle that is in progress.

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