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数据搜索系统，热门电子元器件搜索 |
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数据搜索系统，热门电子元器件搜索 |
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PSD913F2 数据表(PDF) 5 Page - STMicroelectronics |
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PSD913F2 数据表(HTML) 5 Page - STMicroelectronics |
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5 / 91 page  PROG. MCU BUS INTRF. ADIO PORT CNTL0, CNTL1, CNTL2 AD0 – AD15 * PLD INPUT BUS PROG. PORT PORT A PROG. PORT PORT B POWER MANGMT UNIT 4 MBIT MAIN FLASH MEMORY 8 SECTORS VSTDBY PA0 – PA7 PROG. PORT PORT F PROG. PORT PORT G PROG. PORT PORT E PB0 – PB7 PROG. PORT PORT C PROG. PORT PORT D PF0 – PF7 PG0 – PG7 PE0 – PE7 PC0 – PC7 PD0 – PD3 ADDRESS/DATA/CONTROL BUS 66 66 256 KBIT SECONDARY FLASH MEMORY (BOOT OR DATA) 4 SECTORS 64 KBIT BATTERY BACKUP SRAM RUNTIME CONTROL AND I/O REGISTERS SRAM SELECT GPLD OUTPUT GPLD OUTPUT GPLD OUTPUT I/O PORT PLD INPUT CSIOP FLASH ISP PLD (GPLD) FLASH DECODE PLD (DPLD) PLD, CONFIGURATION & FLASH MEMORY LOADER JTAG SERIAL CHANNEL (PE6) PAGE REGISTER EMBEDDED ALGORITHM SECTOR SELECTS SECTOR SELECTS GLOBAL CONFIG. & SECURITY *Additional address lines can be brought into PSD via Port A, B, C, D, or F. |
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