STM8L151C4 datasheet(67/101 Pages) STMICROELECTRONICS

67 / 101 page

STM8L151xx, STM8L152xx

Electrical parameters

Doc ID 15962 Rev 2

67/101

tWU_HSI(AH)

(5)(6)

Wakeup time from

Active-halt mode to

Run mode (using HSI)

5TBD

μs

tWU_LSI(AH)

(5)(6)

Wakeup time from

Active-halt mode to

Run mode (using LSI)

TBD TBD

μs

No floating I/O, unless otherwise specified.

Based on characterization results, unless otherwise specified.

LCD enabled with external VLCD, static duty, division ratio = 256, all pixels active, no LCD connected.

LCD enabled with external VLCD, 1/4 duty, 1/3 bias, division ratio = 64, all pixels active, no LCD connected.

Wakeup time until start of interrupt vector fetch.

The first word of interrupt routine is fetched 4 CPU cycles after tWU.

ULP=0 or ULP=1 and FWU=1 in the PWR_CSR2 register.

Table 21.

Total current consumption and timing in Active-halt mode

at VDD = 1.65 V to 3.6 V

(1)(2) (continued)

Symbol

Parameter

Conditions

Typ

Max

Unit

Table 22.

Total current consumption and timing in Halt mode at VDD = 2 V

(1)(2)

Symbol

Parameter

Condition

Typ

Max

Unit

IDD(Halt)

Supply current in Halt mode

(Ultra low power ULP bit =1 in

the PWR_CSR2 register)

TA = -40 °C to 25 °C

400

TBD

TA = 55 °C

TBD

TBD(3)

TA = 85 °C

TBD

TA = 105 °C

TBD

TBD(3)

IDD(WUHalt)

Supply current during wakeup

time from Halt mode (using

HSI)

TBD

tWU_HSI(Halt)

(4)(5)

Wakeup time from Halt to Run

mode (using HSI)

5TBD

µs

tWU_LSI(Halt)

(4)(5)

Wakeup time from Halt mode

to Run mode (using LSI)

TBD

µs

TA = -40 to 125 °C, no floating I/O, unless otherwise specified

Based on characterization results, unless otherwise specified

Tested in production

ULP=0 or ULP=1 and FWU=1 in the PWR_CSR2 register

Wakeup time until start of interrupt vector fetch.

The first word of interrupt routine is fetched 4 CPU cycles after tWU

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