STM8L151C4 datasheet(13/101 Pages) STMICROELECTRONICS

13 / 101 page

STM8L151xx, STM8L152xx

Functional overview

Doc ID 15962 Rev 2

13/101

3.1

Low power modes

The STM8L15xxx supports five low power modes to achieve the best compromise between

low power consumption, short startup time and available wakeup sources:

●

Wait mode: CPU clock is stopped, but selected peripherals keep running. An internal

or external interrupt or a Reset can be used to exit the microcontroller from Wait mode

(WFE or WFI mode). Wait consumption is around 350 µA.

●

Low power run mode: CPU clock runs. Flash, data EEPROM, voltage regulator and

all peripherals are stopped except RTC and one other peripheral which can remain

active (ex: one timer). Execution is done from RAM with a low speed oscillator (LSI or

LSE). The microcontroller enters Low power run mode by software and can exit from

this mode by software or by a Reset.

All interrupts must be masked. They cannot be used to exit the microcontroller from this

mode. Low power run mode consumption is around 5.4 µA (peripherals OFF).

●

Low power wait mode: This mode is entered when executing a Wait for event in Low

power run mode. It is similar to Low power run mode except that the CPU clock is

stopped. The wakeup from this mode is triggered by a Reset or by an internal or

external event (peripheral event generated by the timers, serial interfaces, DMA

controller (DMA1), comparators and I/O ports). When the wakeup is triggered by an

event, the system goes back to Low power run mode.

All interrupts must be masked. They cannot be used to exit the microcontroller from this

mode. Low power wait mode consumption is around 3 µA (peripherals OFF).

●

Active-halt mode: CPU and peripheral clocks are stopped, except RTC. The wakeup

can be triggered by RTC interrupts, external interrupts or reset. Active-halt

consumption with RTC on LSI is 0.9 µA. Active-halt consumption with RTC on LSE is

1 µA.

●

Halt mode: CPU and peripheral clocks are stopped, the device remains powered on.

The wakeup is triggered by an external interrupt or reset. A few peripherals have also a

wakeup from Halt capability. Switching off the internal reference voltage reduces power

consumption. Through software configuration it is also possible to wake up the device

without waiting for the internal reference voltage wakeup time to have a fast wakeup

time of 6 µs. Halt consumption is 400 nA.

Dynamic consumption in run mode is 190 µA/MHz.

3.2

Central processing unit STM8

3.2.1

Advanced STM8 Core

The 8-bit STM8 core is designed for code efficiency and performance with an Harvard

architecture and a 3-stage pipeline.

It contains 6 internal registers which are directly addressable in each execution context, 20

addressing modes including indexed indirect and relative addressing, and 80 instructions.

Architecture and registers

●

Harvard architecture

●

3-stage pipeline

●

32-bit wide program memory bus - single cycle fetching most instructions

●

X and Y 16-bit index registers - enabling indexed addressing modes with or without

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