STM8L151C4 datasheet(8/101 Pages) STMICROELECTRONICS

8 / 101 page

Introduction

STM8L151xx, STM8L152xx

8/101

Doc ID 15962 Rev 2

Introduction

This document describes the STM8L15xxx family features, pinout, mechanical data and

ordering information.

For more details on the whole STMicroelectronics Ultralow power family please refer to

Section 2.2: Ultralow power continuum on page 11.

The reference manual and Flash programming manuals will be available soon.

For information on the debug module and SWIM (single wire interface module), refer to the

STM8 SWIM communication protocol and debug module user manual (UM0470).

For information on the STM8 core, please refer to the STM8 CPU programming manual

(PM0044).

Description

The STM8L15xxx devices are members of the STM8L Ultralow power 8-bit family. They are

referred to as medium-density devices in the STM8L15xxx reference manual (RM0031) and

in the STM8L Flash programming manual (PM0054). They provide the following benefits:

●

Integrated system

–

Up to 32 Kbytes of medium-density embedded Flash program memory

–

1 Kbyte of data EEPROM

–

Internal high speed and low-power low speed RC.

–

Embedded reset

●

Ultralow power consumption

–

192 µA/MHZ (dynamic consumption)

–

1 µA in Active-halt mode

–

Clock gated system and optimized power management

–

Capability to execute from RAM for Low power wait mode and Low power run

mode

●

Advanced features

–

Up to 16 MIPS at 16 MHz CPU clock frequency

–

Direct memory access (DMA) for memory-to-memory or peripheral-to-memory

access.

●

Short development cycles

–

Application scalability across a common family product architecture with

compatible pinout, memory map and modular peripherals.

–

Wide choice of development tools

The STM8L15xxx family operates from 1.8 V to 3.6 V (down to 1.65 V at power down) and is

available in the -40 to +85 °C and -40 to +125 °C temperature ranges.

The STM8L15xxx Ultralow power family features the enhanced STM8 CPU core providing

increased processing power (up to 16 MIPS at 16 MHz) while maintaining the advantages of

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