| 数据搜索系统,热门电子元器件搜索 |
|
STM8L151C4 数据表(PDF) 51 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
STM8L151C4 数据表(HTML) 51 Page - STMicroelectronics |
|
51 / 101 page ![]() STM8L151xx, STM8L152xx Interrupt vector mapping Doc ID 15962 Rev 2 51/101 25 TIM4 Update/overflow/trigger - - Yes Yes(2) 0x00 806C 26 SPI1 End of Transfer Yes Yes Yes Yes(2) 0x00 8070 27 USART 1 Transmission complete/transmit data register empty -- Yes Yes(2) 0x00 8074 28 USART 1 Receive Register Data full/overrun/idle line detected/parity error -- Yes Yes(2) 0x00 8078 29 I2C1 I2C1 interrupt(4) Yes Yes Yes Yes(2) 0x00 807C 1. The Low power wait mode is entered when executing a WFE instruction in Low power run mode. 2. In WFE mode, this interrupt is served if it has been previously enabled. After processing the interrupt, the processor goes back to WFE mode. When this interrupt is configured as a wakeup event, the CPU wakes up and resumes processing. 3. The interrupt from PVD is logically OR-ed with Port E and F interrupts. Register EXTI_CONF allows to select between Port E and Port F interrupt (see External interrupt port select register (EXTI_CONF) in the RM0031). 4. The device is woken up from Halt or Active-halt mode only when the address received matches the interface address. Table 9. Interrupt mapping (continued) IRQ No. Source block Description Wakeup from Halt mode Wakeup from Active-halt mode Wakeup from Wait (WFI mode) Wakeup from Wait (WFE mode)(1) Vector address |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |