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ATtiny5 数据表(PDF) 26 Page - ATMEL Corporation

部件名 ATtiny5
功能描述  8-bit Microcontroller with 512/1024 Bytes In-System Programmable Flash
PDF  168 Pages
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制造商  ATMEL [ATMEL Corporation]
网页  http://www.atmel.com
标志 ATMEL - ATMEL Corporation

ATtiny5 数据表(HTML) 26 Page - ATMEL Corporation

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8127C–AVR–10/09
ATtiny4/5/9/10
• Bits 3:1 – SM2..SM0: Sleep Mode Select Bits 2..0
These bits select between available sleep modes, as shown in Table 7-2.
Note:
1. This mode is available in all devices, although only ATtiny5/10 are equipped with an ADC
• Bit 0 – SE: Sleep Enable
The SE bit must be written to logic one to make the MCU enter the sleep mode when the SLEEP
instruction is executed. To avoid the MCU entering the sleep mode unless it is the programmer’s
purpose, it is recommended to write the Sleep Enable (SE) bit to one just before the execution of
the SLEEP instruction and to clear it immediately after waking up.
7.4.2
PRR – Power Reduction Register
• Bits 7:2 – Res: Reserved Bits
These bits are reserved and will always read zero.
• Bit 1 – PRADC: Power Reduction ADC
Writing a logic one to this bit shuts down the ADC. The ADC must be disabled before shut down.
The analog comparator cannot use the ADC input MUX when the ADC is shut down.
The ADC is available in ATtiny5/10, only.
• Bit 0 – PRTIM0: Power Reduction Timer/Counter0
Writing a logic one to this bit shuts down the Timer/Counter0 module. When the Timer/Counter0
is enabled, operation will continue like before the shutdown.
Table 7-2.
Sleep Mode Select
SM2
SM1
SM0
Sleep Mode
000
Idle
0
0
1
ADC noise reduction (1)
010
Power-down
011
Reserved
100
Standby
101
Reserved
110
Reserved
111
Reserved
Bit
7
6
5
4
3
2
1
0
0x35
PRADC
PRTIM0
PRR
Read/Write
R
R
R
R
R
R
R/W
R/W
Initial Value
0
0
0
0
0
0
0
0



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