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CS49310 数据表(PDF) 70 Page - Cirrus Logic

部件名 CS49310
功能描述  Multi-Standard Audio Decoder Family
PDF  90 Pages
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制造商  CIRRUS [Cirrus Logic]
网页  http://www.cirrus.com
标志 CIRRUS - Cirrus Logic

CS49310 数据表(HTML) 70 Page - Cirrus Logic

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CS49300 Family DSP
70
DS339F7
10.2. Digital Audio Input Port
The digital audio input port, or DAI, is used for both
compressed and PCM digital audio data input. In
addition this port supports a special clocking mode
in which a clock can be input to directly drive the
internal 33 bit counter. Table 13, “Digital Audio
Input Port,” on page 70 shows the pin names,
mnemonics and pin numbers associated with the
DAI.
The DAI is fully configurable including support for
I2S, left justified and multichannel formats. In
addition the DAI can be programmed for slave
clocks, where LRCLKN1 and SCLKN1 are inputs,
or master clocks, where LRCLKN1 and SCLKN1
are outputs. In order for clocks to be master, the
internal PLL must be used.
STCCLK2 can also be programmed to drive the
internal 33 bit counter. This counter would typically
be driven by a 90kHz clock. The internal counter is
used by certain application code for audio/video
synchronization purposes.
10.3. Compressed Data Input Port
The compressed data input port, or CDI, can be
used for both compressed and PCM data input.
Table 14 shows the mnemonic, pin name and pin
number of the pins associated with the CDI port on
the CS493XX.
The CDI is fully configurable including support for
I2S, left justified and multichannel formats. The CDI
can also be programmed for slave clocks, where
LRCLKN2 and SCLKN2 are inputs, or master
clocks, where LRCLKN2 and SCLKN2 are outputs.
In order for clocks to be mastered, the internal PLL
must be used.
In addition the CDI can be configured for bursty
compressed data input. Bursty audio delivery is a
special format in which only clock (CMPCLK) and
data (CMPDAT) are used to deliver compressed
data to the CS493XX (i.e. no frame clock or
LRCLK). A third line, CMPREQ, is used to request
more data from the host. It is an indicator that the
CS493XX internal FIFO is low on data and can
accept another burst. Typically this mode is used
for compressed data delivery where asynchronous
data transfer occurs in the system, i.e. in a system
such as a set-top box or HDTV. PCM data can not
be presented in this mode since data is interpreted
as a continuous stream with no word boundaries.
10.4. Byte Wide Digital Audio Data Input
Two types of byte wide parallel delivery are
supported by the CS493XX. If using one of the
parallel control modes described in Section 6.2,
“Parallel Host Communication” on page 44, then
the parallel interface can also be used for
Pin Name
Pin Description
Pin Number
SDATAN1
STCCLK2
Serial Data In
Secondary STC clock
22
SCLKN1
Serial Bit Clock
25
LRCLKN1
Frame Clock
26
Table 13. Digital Audio Input Port
LRCLK
SCLK
SDATA
MSB
LSB
M Clocks
Per Channel
MSB
LSB
M Clocks
Per Channel
M Clocks
Per Channel
MSB
LSB
M Clocks
Per Channel
MSB
LSB
M Clocks
Per Channel
MSB
LSB
M Clocks
Per Channel
MSB
LSB
MSB
Figure 45. Multichannel Format
Pin Name
Pin Description
Pin Number
SDATAN2
CMPDATA
Serial Data In
Compressed Data In
27
SCLKN2
CMPCLK
Serial Bit Clock
28
LRCLKN2
CMPREQ
Frame Clock
Data Request Out
29
Table 14. Compressed Data Input Port



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