PCF8811USLASH2DASLASH1 datasheet(43/81 Pages) NXP

43 / 81 page

PCF8811_4

Product data sheet

Rev. 04 — 27 June 2008

43 of 81

NXP Semiconductors

PCF8811

80 x 128 pixels matrix LCD driver

12.2 Initialization

Reset is accomplished by applying an external reset pulse (active LOW) at pad RES.

When reset occurs within the speciﬁed time, all internal registers are reset, however the

RAM is still undeﬁned. The state after reset is described in Section 12.3. Pad RES must

≤ 0.3 V

DD1 when VDD1 reaches VDD(min) (or higher) within a maximum time tVHRL after

VDD1 goes HIGH; see Figure 47.

A reset can also be achieved by sending a reset command. This command can be used

during normal operation but not to initialize the chip after power-on.

12.3 Reset function

12.3.1 Basic command set

After reset the LCD driver has the following state:

• Display setting E = 0 and DAL = 0

• Address commands X[6:0] = 0 and Y[3:0] = 0

• VLCD is equal to 0, the HV multiplier is switched off (PC[1:0] = 00)

• No offset of the programming range (VOFF[2:0] = 0)

• HV multiplier programming (VPR[5:0] = 0)

• 4

× voltage multiplier (S[1:0] = 00)

• After power-on, RAM data is undeﬁned, the reset signal does not change the content

of the RAM

• All LCD outputs at VSS (display off)

• Initial display line set to line 0 (L[6:0] = 0)

• Initial row set to row 0 (C[6:0] = 0)

• Full display selected (P[6:0] = multiplex rate 1:80 or 1:64)

• Display is not mirrored (MX = 0; MY = 0)

• Internal oscillator is off

• Power-save mode is on

• No frame calibration is running

12.3.2 Extended command set

After reset the LCD driver has the following state:

• Display settings E = 0 and DAL = 0

011

× voltage multiplier

100

× voltage multiplier

101

× voltage multiplier

110

× voltage multiplier

111

× voltage multiplier

Table 21.

Multiplication settings …continued

S[2:0]

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