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PCF8811U/2DA/1 数据表(PDF) 61 Page - NXP Semiconductors

部件名 PCF8811U/2DA/1
功能描述  80 x 128 pixels matrix LCD driver
PDF  81 Pages
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制造商  NXP [NXP Semiconductors]
网页  http://www.nxp.com
标志 NXP - NXP Semiconductors

PCF8811U/2DA/1 数据表(HTML) 61 Page - NXP Semiconductors

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PCF8811_4
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 04 — 27 June 2008
61 of 81
NXP Semiconductors
PCF8811
80 x 128 pixels matrix LCD driver
16.2 Serial interface timing characteristics
Fig 40. Parallel interface timing; 6800 series (write mode)
001aai347
tSU;DAT
tHD;DAT
tDS(L)
Tcyc(DS)
tDS(H)
tDAT;ACC
tDAT;OH
tHD;DC
tSU;DC
tHD;RW
tSU;RW
D0 to D7
(Write)
D0 to D7
(Read)
E
D/C
D/C, R/W/WR
SCE
Table 33.
Serial interface timing characteristics[1]
VDD1 = 1.8 V to 3.3 V; VSS = 0 V; VLCD ≤ 9 V; Tamb = −40 °C to +85 °C; unless otherwise specified;
see Figure 41, Figure 42, Figure 43 and Figure 44.
Symbol
Parameter
Min
Max
Unit
fSCLK
clock frequency
9.00
-
MHz
Tcyc
clock cycle SCLK
111
-
ns
tPWH1
SCLK pulse width HIGH
45
-
ns
tPWL1
SCLK pulse width LOW
45
-
ns
tS2
SCE set-up time
50
-
ns
tH2
SCE hold time
45
-
ns
tPWH2
SCE minimum HIGH time
50
-
ns
tH5
SCE start hold time
[2] 50
-
ns
tS3
data/command set-up time
50
-
ns
tH3
data/command hold time
50
-
ns
tS1
SDATA set-up time
50
-
ns
tH1
SDATA hold time
50
-
ns
t1
SDO access time
-
50
ns
t2
SDO disable time
[3] -50
ns



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