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PCF8811U/2DA/1 数据表(PDF) 75 Page - NXP Semiconductors

部件名 PCF8811U/2DA/1
功能描述  80 x 128 pixels matrix LCD driver
PDF  81 Pages
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制造商  NXP [NXP Semiconductors]
网页  http://www.nxp.com
标志 NXP - NXP Semiconductors

PCF8811U/2DA/1 数据表(HTML) 75 Page - NXP Semiconductors

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PCF8811_4
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 04 — 27 June 2008
75 of 81
NXP Semiconductors
PCF8811
80 x 128 pixels matrix LCD driver
18.1.8 Programming specification
[1]
The voltage drop across the ITO track and zebra connector must be taken into account to guarantee a sufficiently high voltage at the
chip pads.
[2]
The Power-down mode (DON = 0 and DAL = 1) and CALMM mode must be active while the VLCDIN pad is being driven.
19. Package outline
Not applicable.
Table 41.
Programming specification
See Figure 54.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
VOTPPROG
voltage applied to pad VOTPPROG
relative to VSS1
programming active
[1] 11
11.5
12
V
programming inactive
[1] VSS − 0.2
0
VSS + 0.2 V
VLCDIN
voltage applied to pad VLCDIN
relative to VSS1
programming active
[1][2] 9
9.5
10
V
programming inactive
[1][2] VDD2 − 0.2 VDD2
4.5
V
ILCDIN
current drawn by VLCDIN during
programming
when programming a
single bit to logic 1
-
850
1000
mA
IVOTPPROG
current drawn by VOTPPROG
during programming
-
100
200
mA
Tamb(PROG)
ambient temperature during
programming
025
40
°C
tSU;SCLK
set-up time of internal data after
last clock
1-
-
µs
tHD;SCLK
hold time of internal data before
next clock
1-
-
µs
tSU;VOTPPROG set-up time of VOTPPROG prior to
programming
1-
10
µs
tHD;VOTPPROG hold time of VOTPPROG after
programming
1
-
10
ms
tPW
pulse width of programming
voltage
100
120
200
ms
Fig 54. Programming waveforms
SCLK
tSU;SCLK
tPW
tHD;SCLK
tHD;VOTPPROG
tSU;VOTPROG
mgw766
VVOTPPROG
VLCDIN



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