PCF8811USLASH2DASLASH1 datasheet(72/81 Pages) NXP

72 / 81 page

PCF8811_4

Product data sheet

Rev. 04 — 27 June 2008

72 of 81

NXP Semiconductors

PCF8811

80 x 128 pixels matrix LCD driver

18.1.5 Interface commands

These instructions are in addition to those indicated in Table 10.

[1]

X = value without meaning.

18.1.5.1

CALMM

This instruction puts the device in calibration mode. This mode enables the shift register

for loading and allows programming of the non-volatile OTP cells to take place. If the seal

bit is set then this mode cannot be accessed and the instruction will be ignored. Once in

calibration mode all commands are interpreted as shift register data. The mode can only

be exited by sending data with DB7 set to logic 0. Reset will also clear this mode. Each

shift register data byte is preceded by D/C = 0 and has only 2 signiﬁcant bits, thus the

remaining 6 bits are ignored. DB7 is the continuation bit (DB7 = 1 remain in CALMM

mode, DB7 = 0 exit CALMM mode). DB0 is the data bit and its value is shifted into the

OTP shift register (on the falling edge of SCLK).

18.1.5.2

Refresh

The action of the ‘Refresh’ instruction is to force the OTP shift register to re-load from the

non-volatile OTP cells. This instruction takes up to 5 ms to complete. During this time all

other instructions may be sent.

In the PCF8811 the ‘Refresh’ instruction is associated with the ‘Power control’ instruction

so that the shift register is automatically refreshed every time the high voltage multiplier is

enabled or disabled. Note that if this instruction is sent while in Power-save mode, the

PC[1:0] bits are updated but the refreshing is ignored.

Fig 52. Basic OTP architecture

DATA TO THE CIRCUIT FOR

CONFIGURATION AND CALIBRATION

SHIFT

FLIP-FLOP

OTP slice

OTP CELL

SHIFT

DATA

INPUT

read data

from the

OTP cell

write data

to the

OTP cell

OTP CELLS

mgu289

Table 38.

Additional interface commands

Instruction

Pad

Command byte

Description

EXT

D/C

R/W/WR

DB7

DB6

DB5

DB4

DB3

DB2

DB1

DB0

CALMM

X[1]

enter CALMM mode

Power control

(‘refresh’)

X[1]

PC1

PC0

switch HVgen on/off to

force a refresh of the shift

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