TLK6002 datasheet(56/96 Pages) TI

56 / 96 page

TLK6002

SLLSE34 – MAY 2010

www.ti.com

Table 3-20. SPI_CONTROL_STATUS

Address: 0x0F

Default: 0x0205

BIT(s)

NAME

DESCRIPTION

ACCESS

15.14

SCL_W

SCL write value

0 = 0 Driven onto SCL line (Default 1’b0)

1 = 1 Driven onto to SCL line

15.13

SCL_GZ

SCL output enable control

0 = SCL treated as output (Default 1’b0)

1 = SCL treated as input. Read value stored in SCL_R (15.12)

15.12

SCL_R

SCL read value (current value of device pin)

0 = 0 Current input value on SCL line

1 = 1 Current input value on SCL line

15.10

SDO_W

SDO write value

0 = 0 Driven onto SDO line (Default 1’b0)

1 = 1 Driven onto to SDO line

15.9

SDO_GZ

SDO output enable control

0 = SDO treated as output

1 = SDO treated as input. Read value stored in SDO_R (15. 8) (Default 1’b1)

15.8

SDO_R

SDO read value (current value of device pin)

0 = 0 Current input value on SDO line

1 = 1 Current input value on SDO line

15.6

SDI_W

SDI write value

0 = 0 Driven onto SDI line (Default 1’b0)

1 = 1 Driven onto to SDI line

15.5

SDI_GZ

SDI output enable control

0 = SDI treated as output (Default 1’b0)

1 = SDI treated as input. Read value stored in SDI_R (15.4)

15.4

SDI_R

SDI read value (current value of device pin)

0 = 0 Current input value on SDI line

1 = 1 Current input value on SDI line

15.2

CS_N_W

CS_N write value

0 = 0 Driven onto CS_N line

1 = 1 Driven onto to CS_N line (Default 1’b1)

15.1

CS_N_GZ

CS_N output enable control

0 = CS_N treated as output (Default 1’b0)

1 = CS_N treated as input. Read value stored in CS_N_R (15.0)

15.0

CS_N_R

CS_N read value (current value of device pin)

0 = 0 Current input value on CS_N line

1 = 1 Current input value on CS_N line

Table 3-21. LATENCY_MEASURE_CONTROL

Address: 0x10

Default: 0x0000

BIT(s)

NAME

DESCRIPTION

ACCESS

16.10

RESERVED

For TI use only.

16.9

RESERVED

For TI use only.

16.8

RESERVED

For TI use only.

16.5:4

LATENCY_MEAS_CLK_DIV[1:0]

Latency measurement clock divide control. Valid only when bit 16.2 is 0.

Divides clock to needed resolution. Higher the divide value, lesser the latency

measurement resolution

00 = Divide by 1 (Default 2’b00) (Most Accurate Measurement)

01 = Divide by 2

10 = Divide by 4

11 = Divide by 8 (Longest Measurement Capability)

See Table 2-6

16.2

LATENCY_MEAS_CLK_SEL

Latency measurement clock selection.

0 = Selects clock listed in Table 2-6. Bits 16.5:4 can be used to divide this clock

to achieve needed resolution. (Default 1’b0)

1 = Selects respective channel recovered byte clock (Frequency = Serial bit

rate/ 10).

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