TLK6002 datasheet(86/96 Pages) TI

86 / 96 page

TLK6002

SLLSE34 – MAY 2010

www.ti.com

Table 4-3. Device Worst Case Total Power Dissipation

VDDQA/B, VDDRA/B, VDDO1/2/3 = 1.6V

VDDQA/B, VDDRA/B, VDDO1/2/3 = 1.9V

HSTL Input Termination

Serial Rate

Disabled

Half Strength

Full Strength

Disabled

Half Strength

Full Strength

(Gbps)

(6.1:0 = 2'b00)

(6.1:0 = 2'b01)

(6.1:0 = 2'b1x)

(6.1:0 = 2'b00)

(6.1:0 = 2'b01)

(6.1:0 = 2'b1x)

0.47

552

994

1322

674

1301

1775

0.6144

596

1024

1351

727

1348

1813

0.768

653

1067

1395

781

1395

1864

1.2288

677

1065

1371

834

1389

1842

1.536

750

1129

1443

906

1462

1889

2.4576

829

1162

1440

1032

1498

1898

3.072

917

1225

1499

1131

1574

1954

4.9512

975

1245

1507

1210

1612

1952

6.144

1046

1315

1562

1305

1690

2038

6.25

1057

1320

1580

1286

1696

2064

The test conditions for above data are: two channels active in transceiver mode, parallel/serial loopback

connections installed external to the device, CRPAT Long data pattern, all unlisted power supplies at

1.05V, and T=85C.

Device Errata:

If VDDQ power supply ramp leads DVDD, the following items must be noted:

1. Register 0x0F usage is not possible

2. CS_N/GPI1/SDI/SDO/DCI signals are not usable

3. Register 28.14 must be asserted manually for CLK_OUT_P/N normal operation

ELECTRICAL SPECIFICATIONS

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