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TLK6002 数据表(PDF) 91 Page - Texas Instruments |
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TLK6002 数据表(HTML) 91 Page - Texas Instruments |
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91 / 96 page  TLK6002 www.ti.com SLLSE34 – MAY 2010 Table 8-2. Device Absolute Receive Latency – SDR and DDR Modes RX SDR/DDR RECEIVE ABSOLUTE LATENCY Note: RX FIFO Depth (When FIFO Enabled) is 4 words. Latency Components Item Minimum Maximum Description A 47 57 Serial Input Bit to RX SERDES Output Register B 10 10 RX SERDES Output Register to RX PMA Register C 10 10 RX PMA Register to Channel Sync Input Register D 10 20 Channel Sync Input Register to Channel Sync Output Register E 10 10 Channel Sync Output Register to 8b/10b Decoder Input Register F 10 10 8b/10b Decoder Input Register to 8b/10b Output Register G 10 10 8b/10b Output Register to RX FIFO Input Register H 10 40 RX FIFO Input Register to RX FIFO Output Register I 10 20 RXFIFO Output Register to RX Parallel Output Register Driven Bit Detail Latency Minimum Maximum Assumption: RX*_[10 and 0] are the first received bits. RX*_[19] 0 127 187 RX*_[10] 9 136 196 RX*_[9] 0 127 187 RX*_[0] 9 136 196 Disabling Channel Synchronization Reduces Above Numbers by 20 Minimum and 30 Maximum bit times. Disabling Decoder Reduces Above Numbers by 20 bit times. Bypassing RX FIFO Reduces Above Numbers by 20 Minimum and 50 Maximum bit times. Latency RX FIFO RX FIFO RX FIFO RX FIFO Summary Bypassed Bypassed Bypassed Enabled Channel Channel Sync Channel Channel Sync On On Sync Off Sync On 8b/10b 8b/10b Decoder 8b/10b 8b/10b Decoder On Off Decoder Off Decoder On Minimum Maximum Minimum Maximum Minimum Maximum Minimum Maximum RX*_[19] 107 137 87 117 67 87 127 187 RX*_[10] 116 146 96 126 76 96 136 196 RX*_[9] 107 137 87 117 67 87 127 187 RX*_[0] 116 146 96 126 76 96 136 196 Table 8-3 show the static latency variance. Note that static latency variation is the difference in absolute latency values possible across device reset/power ups. Copyright © 2010, Texas Instruments Incorporated Appendix D – Device Latency Specification 91 Submit Documentation Feedback Product Folder Link(s): TLK6002 |
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