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TLK6002 数据表(PDF) 63 Page - Texas Instruments

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部件名 TLK6002
功能描述  Dual Channel 0.47Gbps to 6.25Gbps Multi-Rate Transceiver
PDF  96 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

TLK6002 数据表(HTML) 63 Page - Texas Instruments

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TLK6002
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SLLSE34 – MAY 2010
RECOMMENDED OPERATING CONDITIONS (continued)
over operating free-air temperature range (unless otherwise noted)
PARAMETER
CONDITION
MIN NOM
MAX
UNIT
VDDD
28
AVDD
15
DVDD + VPP
62
VDDT
1
ISD
VDDQA/B (1.5V Mode /1.8V Mode)
5/5
Shutdown
PD* Asserted
mA
Current
VDDRA + VDDRB (1.5V Mode /1.8V Mode)
1/1
VDDO1+VDDO2+VDDO3 (1.5V Mode /1.8V
1/2
Mode)
0.05/0.0
VREFTA + VREFTB (1.5V /1.8V Mode)
5
4.3
Reference Clock Timing Requirement (REFCLK_0/1_P/N)
PARAMETER
CONDITION
MIN NOM
MAX
UNIT
Frequency
122.88
–
800
MHz
Relative to Nominal Serial Data Rate
–100
100
Accuracy
ppm
Relative to Incoming Serial Data Rate
–200
200
Accuracy to TXCLK_A/B
Synchronous (Multiple/Divide)
0
0
0
ppm
Duty Cycle
High Time
45%
50%
55%
Jitter
Random and deterministic
40
ps
4.4
Differential Reference Clock Electrical Characteristics (REFCLK_0/1_P/N)
PARAMETER
CONDITION
MIN NOM
MAX
UNIT
Vid
Differential Input Voltage
250
2000
mVdfpp
CIN
Input Capacitance
3
pF
RIN
Input Differential Impedance
80
100
120
Ω
Trise
Rise Time
20% to 80%
50
600
ps
4.5
Differential Clock Output Electrical Characteristics (CLK_OUT_P/N)
PARAMETER
CONDITION
MIN NOM
MAX
UNIT
Vod
Differential Output Voltage
Peak to peak
1000
2000
mVdfpp
TRise
Output Rise Time
10 to 90% 2pF lumped C loadAC Coupled
180
ps
RTERM
Output Termination
CLK_OUT_P/N to DVDD
40
50
60
Ω
FMAX
Output Frequency
0
625
MHz
4.6
LVCMOS Electrical Characteristics (VDDO = VDDO1/VDDO2/VDDO3)
PARAMETER
CONDITION
MIN
NOM
MAX
UNIT
IOH = 2 mA, Driver Enabled (1.8 V)
VDDO – 0.45
VDDO
VOH
High-level output voltage
V
IOH = 2 mA, Driver Enabled (1.5 V)
0.75×VDDO
VDDO
VOL
IOL = –2 mA, Driver Enabled (1.8 V)
0
0.45
V
Low-level output voltage
IOL = –2 mA, Driver Enabled (1.5 V)
0
0.25×VDDO
VIH
High-level input voltage
0.65×VDDO
VDDO+0.3
V
VIL
Low-level input voltage
-0.3
0.35×VDDO
V
IIH, IIL
Receiver Only
Low/High Input Current
±170
µA
Copyright © 2010, Texas Instruments Incorporated
ELECTRICAL SPECIFICATIONS
63
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Product Folder Link(s): TLK6002



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