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XIO2001IPNP 数据表(PDF) 19 Page - Texas Instruments |
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XIO2001IPNP 数据表(HTML) 19 Page - Texas Instruments |
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19 / 131 page  XIO2001 www.ti.com SCPS212D – MAY 2009 – REVISED JANUARY 2010 Table 2-5. PCI System Terminals (continued) ZGU ZAJ PNP I/O CELL CLAMP EXTERNAL SIGNAL DESCRIPTION BALL # BALL # PIN # TYPE TYPE RAIL PARTS REQ5 A12 C09 102 I PCI PCIR PCI request inputs. These signals are REQ4 C09 A09 105 Bus If unused, a used for arbitration on the secondary REQ3 C08 C08 108 weak pullup PCI bus when an external arbiter is not REQ2 A08 C07 110 resistor per used. REQ0 is used as the GNT for REQ1 A06 C06 116 PCI spec the bridge when an external arbiter is REQ0 A04 A04 119 used. PRST N07 L07 51 O PCI PCIR PCI reset. This terminal is an output to – Bus the secondary PCI bus. SERR G03 G02 16 I/O PCI PCIR Pullup PCI system error Bus resistor per PCI spec STOP G01 H01 18 I/O PCI PCIR Pullup PCI stop Bus resistor per PCI spec TRDY H01 J02 22 I/O PCI PCIR Pullup PCI target ready Bus resistor per PCI spec Table 2-6. JTAG Terminals ZGU ZAJ PNP I/O CELL CLAMP EXTERNAL SIGNAL DESCRIPTION BALL # BALL # PIN # TYPE TYPE RAIL PARTS JTAG_TCK M12 N12 65 I LV VDD_33 JTAG test clock input. This signal CMOS provides the clock for the internal TAP controller. Note: This terminal has an internal Optional pullup active pullup resistor. The pullup is resistor active at all times. Note: This terminal should be tied to ground or pulled low if JTAG is not required. JTAG_TDI N12 L10 63 I LV VDD_33 JTAG test data input. Serial test CMOS instructions and data are received on this terminal. Optional pullup Note: This terminal has an internal resistor active pullup resistor. The pullup is active at all times. Note: This terminal can be left unconnected if JTAG is not required. JTAG_TDO M11 N11 61 O LV VDD_33 JTAG test data output. This terminal the CMOS serial output for test instructions and data. – Note: This terminal can be left unconnected if JTAG is not required. JTAG_TMS L10 L11 64 I LV VDD_33 JTAG test mode select. The signal CMOS received at JTAG_TMS is decoded by the internal TAP controller to control test operations. Optional pullup Note: This terminal has an internal resistor active pullup resistor. The pullup is active at all times. Note: This terminal can be left unconnected if JTAG is not required. Copyright © 2009–2010, Texas Instruments Incorporated Overview 19 Submit Documentation Feedback Product Folder Link(s): XIO2001 |
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