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MSP430F2012IN 数据表(PDF) 59 Page - Texas Instruments |
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MSP430F2012IN 数据表(HTML) 59 Page - Texas Instruments |
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59 / 91 page ![]() Bus Keeper EN Direction 0: Input 1: Output P1SEL.4 1 0 P1DIR.4 P1IRQ.4 D EN Module X IN 1 0 Module X OUT P1OUT.4 Interrupt Edge Select Q EN Set P1SEL.4 P1IES.4 P1IFG.4 P1IE.4 P1.4/SMCLK/A4/VREF+/VeREF+/TCK 1 0 DVSS DVCC P1REN.4 To JTAG From JTAG 1 ADC10AE.4 Pad Logic INCHx = 4 A4 To /from ADC 10 positive reference MSP430F20x3 MSP430F20x2 MSP430F20x1 www.ti.com SLAS491G – AUGUST 2005 – REVISED APRIL 2011 Port P1 (P1.4) Pin Schematic, MSP430F20x2 Copyright © 2005–2011, Texas Instruments Incorporated 59 |
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