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MSP430F2012IN 数据表(PDF) 20 Page - Texas Instruments |
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MSP430F2012IN 数据表(HTML) 20 Page - Texas Instruments |
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20 / 91 page ![]() 6 MHz 12 MHz 16 MHz 1.8 V 2.2 V 2.7 V 3.3 V 3.6 V Supply Voltage −V Supply voltage range, during flash memory programming Supply voltage range, during program execution Legend : MSP430F20x3 MSP430F20x2 MSP430F20x1 SLAS491G – AUGUST 2005 – REVISED APRIL 2011 www.ti.com Absolute Maximum Ratings (1) Voltage applied at VCC to VSS -0.3 V to 4.1 V Voltage applied to any pin(2) -0.3 V to VCC + 0.3 V Diode current at any device terminal ±2 mA Unprogrammed device -55 °C to 150°C Tstg Storage temperature(3) Programmed device -40 °C to 150°C (1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions " is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) All voltages referenced to VSS. The JTAG fuse-blow voltage, VFB, is allowed to exceed the absolute maximum rating. The voltage is applied to the TEST pin when blowing the JTAG fuse. (3) Higher temperature may be applied during board soldering according to the current JEDEC J-STD-020 specification with peak reflow temperatures not higher than classified on the device label on the shipping boxes or reels. Recommended Operating Conditions MIN NOM MAX UNIT During program execution 1.8 3.6 VCC Supply voltage V During flash program/erase 2.2 3.6 VSS Supply voltage 0 V I version -40 85 TA Operating free-air temperature °C T version -40 105 VCC = 1.8 V, dc 6 Duty cycle = 50% ± 10% fSYSTE VCC = 2.7 V, Processor frequency (maximum MCLK frequency)(1)(2) dc 12 MHz M Duty cycle = 50% ± 10% VCC ≥ 3.3 V, dc 16 Duty cycle = 50% ± 10% (1) The MSP430 CPU is clocked directly with MCLK. Both the high and low phase of MCLK must not exceed the pulse width of the specified maximum frequency. (2) Modules might have a different maximum input clock specification. See the specification of the respective module in this data sheet. Note: Minimum processor frequency is defined by system clock. Flash program or erase operations require a minimum VCC of 2.2 V. Figure 1. Safe Operating Area 20 Copyright © 2005–2011, Texas Instruments Incorporated |
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