数据搜索系统,热门电子元器件搜索
  Chinese  ▼
ALLDATASHEETCN.COM

X  

MSP430F2012IN 数据表(PDF) 13 Page - Texas Instruments

Click here to check the latest version.
部件名 MSP430F2012IN
功能描述  MIXED SIGNAL MICROCONTROLLER
PDF  91 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

MSP430F2012IN 数据表(HTML) 13 Page - Texas Instruments

Back Button MSP430F2012IN Datasheet HTML 9Page - Texas Instruments MSP430F2012IN Datasheet HTML 10Page - Texas Instruments MSP430F2012IN Datasheet HTML 11Page - Texas Instruments MSP430F2012IN Datasheet HTML 12Page - Texas Instruments MSP430F2012IN Datasheet HTML 13Page - Texas Instruments MSP430F2012IN Datasheet HTML 14Page - Texas Instruments MSP430F2012IN Datasheet HTML 15Page - Texas Instruments MSP430F2012IN Datasheet HTML 16Page - Texas Instruments MSP430F2012IN Datasheet HTML 17Page - Texas Instruments Next Button
Zoom Inzoom in Zoom Outzoom out
 13 / 91 page
background image
MSP430F20x3
MSP430F20x2
MSP430F20x1
www.ti.com
SLAS491G
– AUGUST 2005 – REVISED APRIL 2011
Interrupt Vector Addresses
The interrupt vectors and the power-up starting address are located in the address range of 0FFFFh to 0FFC0h.
The vector contains the 16-bit address of the appropriate interrupt handler instruction sequence.
If the reset vector (located at address 0FFFEh) contains 0FFFFh (for example, flash is not programmed) the
CPU goes into LPM4 immediately after power-up.
Table 7. Interrupt Sources
SYSTEM
INTERRUPT SOURCE
INTERRUPT FLAG
WORD ADDRESS
PRIORITY
INTERRUPT
Power-up
PORIFG
External reset
RSTIFG
Watchdog Timer+
WDTIFG
Reset
0FFFEh
31, highest
Flash key violation
KEYV
PC out-of-range(1)
See (2)
NMI
NMIIFG
(non)-maskable,
Oscillator fault
OFIFG
(non)-maskable,
0FFFCh
30
Flash memory access violation
ACCVIFG(2)(3)
(non)-maskable
0FFFAh
29
0FFF8h
28
Comparator_A+ (MSP430F20x1)
CAIFG(4)
maskable
0FFF6h
27
Watchdog Timer+
WDTIFG
maskable
0FFF4h
26
Timer_A2
TACCR0 CCIFG(4)
maskable
0FFF2h
25
Timer_A2
TACCR1 CCIFG.TAIFG(2)(4)
maskable
0FFF0h
24
0FFEEh
23
0FFECh
22
ADC10 (MSP430F20x2)
ADC10IFG(4)
maskable
0FFEAh
21
SD16CCTL0 SD16OVIFG,
SD16_A (MSP430F20x3)
maskable
SD16CCTL0 SD16IFG(2)(4)
USI
USIIFG, USISTTIFG(2)(4)
maskable
0FFE8h
20
(MSP430F20x2, MSP430F20x3)
I/O Port P2 (two flags)
P2IFG.6 to P2IFG.7(2)(4)
maskable
0FFE6h
19
I/O Port P1 (eight flags)
P1IFG.0 to P1IFG.7(2)(4)
maskable
0FFE4h
18
0FFE2h
17
0FFE0h
16
See (5)
0FFDEh to 0FFC0h
15 to 0, lowest
(1)
A reset is generated if the CPU tries to fetch instructions from within the module register memory address range (0h to 01FFh) or from
within unused address ranges.
(2)
Multiple source flags
(3)
(non)-maskable: the individual interrupt-enable bit can disable an interrupt event, but the general interrupt enable cannot.
(4)
Interrupt flags are located in the module.
(5)
The interrupt vectors at addresses 0FFDEh to 0FFC0h are not used in this device and can be used for regular program code if
necessary.
Copyright
© 2005–2011, Texas Instruments Incorporated
13



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91


数据表 下载

Go To PDF Page


链接网址



ALLDATASHEET是否为您带来帮助?  [ DONATE ] 

关于 Alldatasheet   |   广告服务   |   联系我们   |   隐私政策   |   数据表链接    |   链接交换   |   制造商名单
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com