AFS090 datasheet(166/334 Pages) MICROSEMI

166 / 334 page

Device Architecture

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R e v isio n 2

5 V Output Tolerance

Fusion I/Os must be set to 3.3 V LVTTL or 3.3 V LVCMOS mode to reliably drive 5 V TTL receivers. It is

also critical that there be NO external I/O pull-up resistor to 5 V, since this resistor would pull the I/O pad

voltage beyond the 3.6 V absolute maximum value and consequently cause damage to the I/O.

When set to 3.3 V LVTTL or 3.3 V LVCMOS mode, Fusion I/Os can directly drive signals into 5 V TTL

receivers. In fact, VOL = 0.4 V and VOH = 2.4 V in both 3.3 V LVTTL and 3.3 V LVCMOS modes exceed

the VIL = 0.8 V and VIH = 2 V level requirements of 5 V TTL receivers. Therefore, level '1' and level '0'

will be recognized correctly by 5 V TTL receivers.

Simultaneously Switching Outputs and PCB Layout

•

Simultaneously switching outputs (SSOs) can produce signal integrity problems on adjacent

signals that are not part of the SSO bus. Both inductive and capacitive coupling parasitics of bond

wires inside packages and of traces on PCBs will transfer noise from SSO busses onto signals

adjacent to those busses. Additionally, SSOs can produce ground bounce noise and VCCI dip

noise. These two noise types are caused by rapidly changing currents through GND and VCCI

package pin inductances during switching activities:

•

Ground bounce noise voltage = L(GND) * di/dt

•

VCCI dip noise voltage = L(VCCI) * di/dt

Any group of four or more input pins switching on the same clock edge is considered an SSO bus. The

shielding should be done both on the board and inside the package unless otherwise described.

In-package shielding can be achieved in several ways; the required shielding will vary depending on

whether pins next to SSO bus are LVTTL/LVCMOS inputs, LVTTL/LVCMOS outputs, or

GTL/SSTL/HSTL/LVDS/LVPECL inputs and outputs. Board traces in the vicinity of the SSO bus have to

be adequately shielded from mutual coupling and inductive noise that can be generated by the SSO bus.

Also, noise generated by the SSO bus needs to be reduced inside the package.

PCBs perform an important function in feeding stable supply voltages to the IC and, at the same time,

maintaining signal integrity between devices.

Key issues that need to considered are as follows:

•

Power and ground plane design and decoupling network design

•

Transmission line reflections and terminations

AFS090 数据表(PDF) 166 Page - Microsemi Corporation

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