WM8321 datasheet(39/253 Pages) WOLFSON

部件名	WM8321

功能描述	Processor Power Management Subsystem

PDF	253 Pages

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制造商	WOLFSON [Wolfson Microelectronics plc]

网页	http://www.wolfsonmicro.com

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39 / 253 page

Production Data

WM8321

PD, February 2012, Rev 4.0

The WM8321 can generate an Auxiliary Reset output via a GPIO pin configured as “Auxiliary Reset”

output (see Section 21). This signal is asserted in the OFF state. The status of the Auxiliary Reset in

the SLEEP state is configurable, using the AUXRST_SLPENA register bit as defined in Table 8.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R16390 (4006h)

Reset Control

AUXRST_SLPE

Sets the output status of Auxiliary

Reset (GPIO) function in SLEEP

0 = Auxiliary Reset not asserted

1 = Auxiliary Reset asserted

Protected by user key

Table 8 Auxiliary Reset (GPIO) Control

The timing details of the RESET

¯¯¯¯¯¯ pin relative to an ON state transition are illustrated in Figure 6.

Power State

Time

RESET pin

OFF

State Transition

Time delay set by

PWRSTATE_DELAY

1ms or 10ms

ON transition.

Nominal duration = 5 x 2ms

RESET delay set by RST_DUR

3ms, 11ms, 51ms or 101ms

Figure 6 RESET Pin Output

WM8321 数据表(PDF) 39 Page - Wolfson Microelectronics plc

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