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WM8321 数据表(PDF) 69 Page - Wolfson Microelectronics plc

部件名 WM8321
功能描述  Processor Power Management Subsystem
PDF  253 Pages
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制造商  WOLFSON [Wolfson Microelectronics plc]
网页  http://www.wolfsonmicro.com
标志 WOLFSON - Wolfson Microelectronics plc

WM8321 数据表(HTML) 69 Page - Wolfson Microelectronics plc

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Production Data
WM8321
w
PD, February 2012, Rev 4.0
69
15.11 POWER MANAGEMENT REGISTER DEFINITIONS
15.11.1 DC-DC CONVERTER AND LDO REGULATOR ENABLE
The Enable and Status register bits for the DC-DC Converters and LDO Regulators are defined in
Table 31.
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R16464 (4050h)
DCDC Enable
3:0
DCm_ENA
0
DC-DCm Enable request
0 = Disabled
1 = Enabled
(Note that the actual status is
indicated in DCm_STS)
R16465 (4051h)
LDO Enable
10:0
LDOn_ENA
0
LDOn Enable request
0 = Disabled
1 = Enabled
(Note that the actual status is
indicated in LDOn_STS)
R16466 (4052h)
DCDC Status
3:0
DCm_STS
0
DC-DCm Status
0 = Disabled
1 = Enabled
R16467 (4053h)
LDO Status
10:0
LDOn_STS
0
LDOn Status
0 = Disabled
1 = Enabled
Notes:
1.
n
is a number between 1 and 11 that identifies the individual LDO Regulator.
2.
m
is a number between 1 and 4 that identifies the individual DC-DC Converter.
Table 31 DC-DC Converter and LDO Regulator Control
The Enable and Status register bits for the External Power Enable (EPE) Controls are defined in
Table 32.
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R16464 (4050h)
DCDC Enable
7
EPE2_ENA
0
EPE2 Enable request
0 = Disabled
1 = Enabled
(Note that the actual status is
indicated in EPE2_STS)
6
EPE1_ENA
0
EPE1 Enable request
0 = Disabled
1 = Enabled
(Note that the actual status is
indicated in EPE1_STS)
R16466 (4052h)
DCDC Status
7
EPE2_STS
0
EPE2 Status
0 = Disabled
1 = Enabled
6
EPE1_STS
0
EPE1 Status
0 = Disabled
1 = Enabled
Table 32 External Power Enable (EPE) Control
15.11.2 DC-DC SYNCHRONOUS BUCK CONVERTER CONTROL
The register controls for configuring the DC-DC synchronous buck converters 1-4 are defined in Table
33.
Note that the DCm_ON_SLOT fields and the 5 MSBs of DCm_ON_VSEL may also be stored in the
integrated OTP memory. See Section 14 for details.



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